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1. (WO2001033630) METHODS AND COMPOSITIONS FOR DETECTION AND TREATMENT OF BREAST CANCER, BASED ON BREAST CANCER-ASSOCIATED POLYPEPTIDES
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2001/033630 International Application No.: PCT/US2000/029993
Publication Date: 10.05.2001 International Filing Date: 31.10.2000
Chapter 2 Demand Filed: 29.05.2001
IPC:
H01L 21/48 (2006.01) ,H01L 21/66 (2006.01) ,H01L 23/498 (2006.01) ,H01L 23/538 (2006.01) ,H05K 1/02 (2006.01) ,H05K 1/14 (2006.01) ,H05K 3/00 (2006.01) ,H05K 3/22 (2006.01) ,H05K 3/46 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
48
Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/06-H01L21/326201
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
66
Testing or measuring during manufacture or treatment
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
498
Leads on insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
538
the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
14
Structural association of two or more printed circuits
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
22
Secondary treatment of printed circuits
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
46
Manufacturing multi-layer circuits
Applicants:
ALLIEDSIGNAL INC. [US/US]; 101 Columbia Avenue P.O. Box 2245 Morristown, NJ 07960, US
Inventors:
POMMER, Richard; US
BANISTER, Brad; US
MCELREA, Simon; US
Agent:
CRISS, Roger, H. ; AlliedSignal Inc. 101 Columbia Avenue P.O. Box 2245 Morristown, NJ 07960, US
Priority Data:
09/432,20002.11.1999US
Title (EN) METHODS AND COMPOSITIONS FOR DETECTION AND TREATMENT OF BREAST CANCER, BASED ON BREAST CANCER-ASSOCIATED POLYPEPTIDES
(FR) SUBSTRAT D"INTERCONNEXION MULTICOUCHE
Abstract:
(EN) Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.
(FR) L"invention concerne un procédé et un appareil permettant d"augmenter le rendement obtenu durant la production d"un substrat d"interconnexion à haute densité. L"invention concerne en particulier des procédés consistant à tester des flans afin d"identifier les bonnes cellules/parties, à retirer les bonnes cellules du flan, à créer de nouveaux flans entièrement à partir de bonnes cellules identifiées/connues, ce qui permet d"augmenter le nombre de couches utilisées dans un substrat d"interconnexion à haute densité sans entraîner une baisse de rendement associée normalement à un tel procédé de structuration en couche.
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Designated States: AE, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, CA, CH, CN, CR, CU, CZ, DE, DK, DM, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, NO, NZ, PL, PT, RO, RU, SD, SE, SG, SI, SK, SL, TJ, TM, TR, TT, TZ, UA, UG, UZ, VN, YU, ZA, ZW
African Regional Intellectual Property Organization (ARIPO) (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)