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1. (WO2001033322) SLEEP STATE TRANSITIONING

Pub. No.:    WO/2001/033322    International Application No.:    PCT/US2000/041489
Publication Date: Fri May 11 01:59:59 CEST 2001 International Filing Date: Tue Oct 24 01:59:59 CEST 2000
IPC: G06F 1/26
G06F 1/32
G06F 9/445
G06F 12/00
Applicants: INTEL CORPORATION
JAIN, Satchit
CHO, Sung-Soo
Inventors: JAIN, Satchit
CHO, Sung-Soo
Title: SLEEP STATE TRANSITIONING
Abstract:
A system has a processor with multiple states, including an awake state and a sleep state, a memory subsystem including a memory controller and memory devices, and a second memory. The system uses software in the second memory to initialize the memory controller upon a transition from a sleep state to an awake state. The system detects a wake event trigger, and in response to the wake event trigger, executes software stored in the second memory to initialize the memory controller, and then executes software out of the first memory after the initialization.