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1. (WO2001018860) IMPROVED APPARATUS AND METHODS FOR INTEGRATED CIRCUIT PLANARIZATION
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2001/018860 International Application No.: PCT/US2000/024847
Publication Date: 15.03.2001 International Filing Date: 11.09.2000
Chapter 2 Demand Filed: 05.04.2001
IPC:
G03F 7/00 (2006.01) ,H01L 21/3105 (2006.01)
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
F
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
7
Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105
After-treatment
Applicants:
ALLIEDSIGNAL INC. [US/US]; 101 Columbia Avenue P.O. Box 2245 Morristown, NJ 07960, US
Inventors:
ENDISH, Denis, H.; US
TOWERY, Daniel, Lynne; US
LEVERT, Joseph, A.; US
DRAGE, James, S.; US
Agent:
CRISS, Roger, H. ; AlliedSignal Inc. 101 Columbia Avenue P.O. Box 2245 Morristown, NJ 07960, US
Priority Data:
09/392,41309.09.1999US
09/549,65914.04.2000US
Title (EN) IMPROVED APPARATUS AND METHODS FOR INTEGRATED CIRCUIT PLANARIZATION
(FR) APPAREIL ET PROCEDES AMELIORES D'APLANISSEMENT DE CI
Abstract:
(EN) An apparatus for planarizing or patterning a dielectric film on a substrate is provided. The apparatus includes a press for applying contact pressure to an operably connected compression tool. The compression tool has a working face that is planar or patterned. A controller for regulating the position, timing and force applied by the compression tool to the dielectric film is also provided. There is also provided a support, with an optional workpiece holder for supporting the substrate and dielectric film during contact with the compression tool. Methods of using the apparatus, as well as planarized and/or patterned dielectric films are also provided.
(FR) L'invention porte sur un appareil d'aplanissement de films diélectriques formés sur des substrat et de formation de motifs sur ces mêmes films. Ledit appareil comprend: une presse appliquant une pression de contact sur un outil de compression lui étant relié présentant une face de travail plane ou à motifs; un contrôleur réglant la position, le moment et l'intensité de la force appliquée par l'outil de compression sur le film diélectrique; et un support facultativement muni d'un préhenseur saisissant le substrat et le film diélectrique lorsqu'ils entrent en contact avec l'outil de compression. L'invention porte également sur les modes d'utilisation de l'appareil et sur les films diélectriques aplanis ou dessinés ainsi obtenus.
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Designated States: AE, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, CA, CH, CN, CR, CU, CZ, DE, DK, DM, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, NO, NZ, PL, PT, RO, RU, SD, SE, SG, SI, SK, SL, TJ, TM, TR, TT, TZ, UA, UG, UZ, VN, YU, ZA, ZW
African Regional Intellectual Property Organization (ARIPO) (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)