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1. (WO2001004927) METHODOLOGIES TO REDUCE PROCESS SENSITIVITY TO THE CHAMBER WALL CONDITION
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2001/004927 International Application No.: PCT/US2000/019152
Publication Date: 18.01.2001 International Filing Date: 12.07.2000
Chapter 2 Demand Filed: 09.02.2001
IPC:
H01J 37/32 (2006.01) ,H01L 21/3065 (2006.01) ,H01L 21/3213 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
J
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
37
Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
32
Gas-filled discharge tubes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
3065
Plasma etching; Reactive-ion etching
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
321
After-treatment
3213
Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
Applicants:
APPLIED MATERIALS, INC. [US/US]; 3050 Bowers Avenue Santa Clara, CA 95052, US
Inventors:
XU, Songlin; US
SUN, Zhiwen; US
PODLESNIK, Dragan; US
QIAN, Xueyu; US
Agent:
MOSER, Ray, R. ; Thomason, Moser & Patterson Suite 1500 3040 Post Oak Boulevard Houston, TX 77056, US
Priority Data:
09/352,00812.07.1999US
Title (EN) METHODOLOGIES TO REDUCE PROCESS SENSITIVITY TO THE CHAMBER WALL CONDITION
(FR) NOUVELLES METHODOLOGIES PERMETTANT DE REDUIRE LA SENSIBILITE D'UN TRAITEMENT AUX CONDITIONS PREVALANT DANS LA CHAMBRE
Abstract:
(EN) A method and apparatus for reducing the sensitivity of semiconductor processing to chamber conditions is provided. Process repeatability of common processes are affected by changing surface conditions which alter the recombination rates of processing chemicals to the chamber surfaces. In one aspect of the invention, a composition of one or more etchants is selected to optimize the etch performance and reduce deposition on chamber surfaces. The one or more etchants are selected to minimize buildup on the chamber surfaces, thereby controlling the chamber surface condition to minimize changes in etch rates due to differing recombination rates of free radicals with different surface conditions and achieve etch repeatability. In another embodiment, the etchant chemistry is adjusted to reduce the change to internal surface conditions after a cleaning cycle. In another embodiment, a process recipe is selected to reduce the sensitivity of the etch process to the chamber conditions. In another embodiment, chamber surface materials are selected to minimize the differences in recombination rates of free radicals on the surface materials and the byproduct depositions formed on the materials during processing.
(FR) L'invention concerne un procédé et un appareil pouvant réduire la sensibilité d'un traitement de semi-conducteurs aux conditions prévalant dans la chambre. La répétabilité de traitements communs est affectée par des conditions de surface changeantes qui modifient les taux de recombinaison des produit chimiques de traitement par rapport aux surfaces de la chambre. Dans un aspect de l'invention, une composition d'un ou plusieurs agents de gravure est choisie pour optimiser les performances de gravure et diminuer le dépôt sur les surfaces de la chambre. Ces agents de gravure sont choisis pour réduire au maximum l'accumulation sur les surfaces de la chambre, ce qui permet de contrôler l'état des surfaces de la chambre aux fins de minimiser les modifications de vitesses de gravure dues à des écarts dans les taux de recombinaison des radicaux libres présentant des conditions de surface différentes et obtenir la répétabilité de la gravure. Dans un autre aspect de l'invention, les produits chimiques de gravure sont calibrés pour réduire le changement apporté à l'état de la surface interne après un cycle de nettoyage. Dans un autre aspect, une recette de traitement est choisie aux fins de réduire la sensibilité du procédé de gravure aux conditions dans la chambre. Dans un aspect différent, des matériaux de surface de chambre sont choisis pour réduire au minimum les écarts entre les taux de recombinaison des radicaux libres sur les matériaux de surface et les dépôts de sous-produits formés sur les matériaux pendant le traitement.
Designated States: JP, KR
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)