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1. (WO2001004765) METHODS AND APPARATUS FOR INSTRUCTION ADDRESSING IN INDIRECT VLIW PROCESSORS

Pub. No.:    WO/2001/004765    International Application No.:    PCT/US2000/040143
Publication Date: Fri Jan 19 00:59:59 CET 2001 International Filing Date: Thu Jun 08 01:59:59 CEST 2000
IPC: G06F 9/30
G06F 9/318
G06F 9/32
G06F 9/38
Applicants: BOPS INCORPORATED
Inventors: BARRY, Edwin, F.
PECHANEK, Gerald, G.
Title: METHODS AND APPARATUS FOR INSTRUCTION ADDRESSING IN INDIRECT VLIW PROCESSORS
Abstract:
An indirect VLIW (iVLIW) architecture is described which contains a minimum of two instruction memories. The first instruction memory (SIM) contains short-instruction-words (SIWs) of a fixed length. The second instruction memory (VIM), contains very-long-instruction-words (VLIWs) which allow execution of multiple instructions in parallel. Each SIW may be fetched and executed as an independent instruction by one of the available execution units. A special class of SIW is used to reference the VIM indirectly to either execute or load a specified VLIW instruction (called an 'XV' instruction for 'eXecute VLIW', or LV for 'Load VLIW'). In these cases, the SIW instruction specifies how the location of the VLIW is to be accessed. Other aspects of this approach relate to the application of data memory addressing techniques for execution or loading of VLIWs that parallel the addressing modes used for data memory accesses. These addressing techniques provide tremendous flexibility for VLIW instruction execution.