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1. (WO2001001493) MEMORY CELL ARRAY AND CORRESPONDING PRODUCTION METHOD

Pub. No.:    WO/2001/001493    International Application No.:    PCT/DE2000/001768
Publication Date: Fri Jan 05 00:59:59 CET 2001 International Filing Date: Wed May 31 01:59:59 CEST 2000
IPC: H01L 21/8247
H01L 27/115
Applicants: INFINEON TECHNOLOGIES AG
RUSCH, Andreas
TRÜBY, Alexander
ZIMMERMANN, Ulrich
KOHLHASE, Armin
BÖHM, Thomas
HAIN, Manfred
OTANI, Yoichi
Inventors: RUSCH, Andreas
TRÜBY, Alexander
ZIMMERMANN, Ulrich
KOHLHASE, Armin
BÖHM, Thomas
HAIN, Manfred
OTANI, Yoichi
Title: MEMORY CELL ARRAY AND CORRESPONDING PRODUCTION METHOD
Abstract:
In a semiconductor body (1), electrically insulating areas (3), in-between which trenches are etched, are laterally staggered in relation to one another forming rows. Floating gates (5) consisting of polysilicon spacers are produced in the trenches in the fractions of the side walls formed by the semiconductor material. The trenches are filled with doped polysilicon as control gates (6). Doped source/drain areas (4) are located at the bottom of the trenches. Conductors (8) serving as bit lines contacting the semiconductor material in the contact areas (17) extend crosswise relative to the trenches.