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1. (WO2001001464) POLYSILICON SEMICONDUCTOR THIN FILM SUBSTRATE, METHOD FOR PRODUCING THE SAME, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2001/001464 International Application No.: PCT/JP2000/004141
Publication Date: 04.01.2001 International Filing Date: 23.06.2000
Chapter 2 Demand Filed: 21.09.2000
IPC:
H01L 21/20 (2006.01) ,H01L 21/336 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
Applicants:
KIMURA, Yoshinobu [JP/JP]; JP (UsOnly)
KAMO, Takahiro [JP/JP]; JP (UsOnly)
KANEKO, Yoshiyuki [JP/JP]; JP (UsOnly)
HITACHI, LTD. [JP/JP]; 6, Kanda Surugadai 4-chome Chiyoda-ku Tokyo 101-8010, JP (AllExceptUS)
Inventors:
KIMURA, Yoshinobu; JP
KAMO, Takahiro; JP
KANEKO, Yoshiyuki; JP
Agent:
SAKUTA, Yasuo; Hitachi, Ltd. 5-1, Marunouchi 1-chome Chiyuda-ku Tokyo 100-8220, JP
Priority Data:
11/18155928.06.1999JP
Title (EN) POLYSILICON SEMICONDUCTOR THIN FILM SUBSTRATE, METHOD FOR PRODUCING THE SAME, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
(FR) SUBSTRAT A COUCHE MINCE EN SEMI-CONDUCTEUR POLYSILICIUM, SON PROCEDE DE PRODUCTION, DISPOSITIF A SEMI-CONDUCTEUR ET DISPOSITIF ELECTRONIQUE
Abstract:
(EN) A method for producing a semiconductor device by forming an amorphous semiconductor film on an insulating substrate, irradiating the amorphous semiconductor film with a laser beam to crystallize the amorphous semiconductor film and thereby to form a polycrystalline semiconductor film, and fabricating a transistor in the polycrystalline semiconductor film, wherein the back of the insulating substrate or the amorphous semiconductor film is irradiated with ultraviolet radiation to heat the amorphous semiconductor film to a temperature under the melting point, the amorphous semiconductor film is irradiated with a laser beam with a shape selection suitable laser beam energy density Ec at which crystal grains whose the number of nearest crystal grains is six are formed the most so as to change the amorphous semiconductor film to a polycrystalline semiconductor film, and a transistor is fabricated in the polycrystalline semiconductor film. A thin film transistor capable of operating at high speed can be fabricated with high yield.
(FR) L'invention concerne un procédé de production d'un dispositif à semi-conducteur consistant à former une couche mince en semi-conducteur amorphe sur un substrat isolant, à irradier la couche mince en semi-conducteur amorphe avec un faisceau laser pour cristalliser la couche mince en semi-conducteur amorphe et ainsi former une couche mince en semi-conducteur polycristallin, et à fabriquer un transistor dans la couche mince en semi-conducteur polycristallin, dans lequel l'arrière du substrat isolant ou de la couche mince en semi-conducteur amorphe est irradié avec un rayonnement ultraviolet pour chauffer la couche mince en semi-conducteur amorphe à une température inférieure à celle du point de fusion, la couche mince en semi-conducteur amorphe est irradiée avec un faisceau laser avec une sélection de formes adaptée à la densité Ec d'énergie du faisceau laser à laquelle les grains cristallins, dont le nombre de grains cristallins le plus proche est de 6, sont formés pour la plupart de manière à changer la couche mince en semi-conducteur amorphe en une couche mince en semi-conducteur polycristallin, et un transistor est fabriqué dans la couche mince en semi-conducteur polycristallin. Un transistor à couche mince capable de fonctionner à grande vitesse peut être fabriqué avec un rendement élevé.
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Designated States: CN, JP, KR, US
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)