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Machine translation
1. (WO2000060656) METHOD FOR PRODUCING PORTABLE ELECTRONIC DEVICES HAVING AN INTEGRATED CIRCUIT WHICH IS PROTECTED BY A PULVERIZED FILM
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2000/060656    International Application No.:    PCT/FR2000/000793
Publication Date: 12.10.2000 International Filing Date: 30.03.2000
Chapter 2 Demand Filed:    31.10.2000    
IPC:
G06K 19/077 (2006.01), H01L 21/56 (2006.01), H01L 23/31 (2006.01)
Applicants: GEMPLUS [FR/FR]; Avenue du Pic de Bertagne, Parc d'Activités de Gémenos, F-13881 Gémenos Cedex (FR) (For All Designated States Except US).
GARNIER, Pierre [FR/FR]; (FR) (For US Only)
Inventors: GARNIER, Pierre; (FR)
Agent: NONNENMACHER, Bernard; Gemplus, Avenue du Pic de Bertagne, Parc d'Activités de Gémenos, F-13881 Gémenos Cedex (FR)
Priority Data:
99/04193 02.04.1999 FR
Title (EN) METHOD FOR PRODUCING PORTABLE ELECTRONIC DEVICES HAVING AN INTEGRATED CIRCUIT WHICH IS PROTECTED BY A PULVERIZED FILM
(FR) PROCEDE DE FABRICATION DE DISPOSITIFS ELECTRONIQUES PORTABLES A CIRCUIT INTEGRE PROTEGE PAR UN FILM PULVERISE
Abstract: front page image
(EN)The invention relates to a method for producing a portable electronic device having an integrated circuit, characterized in that the inventive method includes a step which consists in directly pulverizing a protective material onto a dielectric support film (15) bearing a plurality of chips (10) that are glued and connected to connection areas (18) by wire cabling in order to create a protective film (51) on each chip (10) and the connection wires (17) thereof. The inventive method enables the thickness and shape of the protection (51) to be controlled despite high-speed operation.
(FR)L'invention concerne un procédé de fabrication d'un dispositif électronique portable à circuit intégré, caractérisé en ce qu'il comporte une étape consistant à pulvériser un matériau de protection directement sur un film support diélectrique (15) portant une pluralité de puces (10) collées et connectées à des plages de connexion (18) par câblage filaire de manière à réaliser un film de protection (51) sur chaque puce (10) et de ses fils de connexion (17). Le procédé selon l'invention permet de maîtriser l'épaisseur et la forme de la protection (51) tout en opérant à haute cadence.
Designated States: AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, CA, CH, CN, CU, CZ, DE, DK, EE, ES, FI, GB, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MD, MG, MK, MN, MW, MX, NO, NZ, PL, PT, RO, RU, SD, SE, SG, SI, SK, SL, TJ, TM, TR, TT, UA, UG, US, UZ, VN, YU, ZA, ZW.
African Regional Intellectual Property Organization (GH, GM, KE, LS, MW, SD, SL, SZ, TZ, UG, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG).
Publication Language: French (FR)
Filing Language: French (FR)