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1. WO2000042665 - POWER MOS ELEMENT AND METHOD FOR PRODUCING THE SAME

Publication Number WO/2000/042665
Publication Date 20.07.2000
International Application No. PCT/EP1999/000109
International Filing Date 11.01.1999
Chapter 2 Demand Filed 10.04.2000
IPC
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
H01L 29/06 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/10 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H01L 29/417 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
41characterised by their shape, relative sizes or dispositions
417carrying the current to be rectified, amplified or switched
H01L 29/423 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
H01L 29/45 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
43characterised by the materials of which they are formed
45Ohmic electrodes
CPC
H01L 29/0696
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0684characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
0692Surface layout
0696of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
H01L 29/1095
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1095Body region, i.e. base region, of DMOS transistors or IGBTs
H01L 29/402
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
H01L 29/404
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
404Multiple field plate structures
H01L 29/407
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
407Recessed field plates, e.g. trench field plates, buried field plates
H01L 29/41741
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
417carrying the current to be rectified, amplified or switched
41725Source or drain electrodes for field effect devices
41741for vertical or pseudo-vertical devices
Applicants
  • FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V. [DE/DE]; Leonrodstrasse 54 D-80636 München, DE (AllExceptUS)
  • WAHL, Uwe [DE/DE]; DE (UsOnly)
  • VOGT, Holger [DE/DE]; DE (UsOnly)
Inventors
  • WAHL, Uwe; DE
  • VOGT, Holger; DE
Agents
  • SCHOPPE, Fritz; Schoppe, Zimmermann & Stöckeler Postfach 71 08 67 D-81458 München, DE
Priority Data
Publication Language German (DE)
Filing Language German (DE)
Designated States
Title
(DE) MOS-LEISTUNGSBAUELEMENT UND VERFAHREN ZUM HERSTELLEN DESSELBEN
(EN) POWER MOS ELEMENT AND METHOD FOR PRODUCING THE SAME
(FR) COMPOSANT DE PUISSANCE MOS ET PROCEDE DE FABRICATION DUDIT COMPOSANT
Abstract
(DE)
Ein MOS-Leistungsbauelement umfaßt einen Driftbereich mit einer Dotierung eines ersten Dotierungstyps, einen Kanalbereich mit einer Dotierung eines zweiten Dotierungstyps, der zu dem ersten Dotierungstyp komplementär ist, und der an den Kanalbereich und an den Driftbereich angrenzt, und einen Sourcebereich mit einer Dotierung des ersten Dotierungstyps, wobei der Sourcebereich an den Kanalbereich angrenzt. Ferner umfaßt das MOS-Leistungsbauelement eine Mehrzahl von im wesentlichen parallelen Gategräben (12a - 12f), die sich bis zum Driftbereich erstrecken und ein elektrisch leitfähiges Material aufweisen, das durch einen Isolator von dem Transistorgebiet isoliert ist. Die einzelnen Gategräben sind durch einen Anschlußgategraben (22a, 22b) verbunden, wobei ein Gatekontakt lediglich über Kontaktlöcher in den Anschlußgategraben mit den aktiven Gategräben elektrischleitend verbunden ist. Zur Herstellung genügen drei Photolithographieschritte, welche zum Ätzen der Gategräben und des Anschlußgategrabens, zum Erzeugen der Kontaktlöcher für den Sourcebereich und den Kanalbereich sowie für den Anschlußgategraben bzw. für das abschließende Strukturieren des Gatekontakts (24) und des Sourcekontakts (20) dienen. Damit ist ein flexibles Layoutkonzept möglich, bei dem der Gatekontakt (24) ohne zuzätzlichen Aufwand auch in der Mitte oder an anderer Stelle des MOS-Leistungsbauelements plaziert werden kann. Optional können Randterminierungsstrukturen (26a, 26b) parallel zu der Ausbildung des aktiven Transistorbereiches ohne zusätzliche Prozeßschritte in Form von umlaufenden floatenden Ringen oder von floatenden Feldplatten hergestellt werden.
(EN)
The invention relates to a power MOS element which comprises a drift region with a dopant of a first dopant type and a channel region with a dopant of a second dopant type that is complementary to said first dopant type, said channel region bordering on the drift region. The power MOS element further comprises a source region with a dopant of a first dopant type, said source region bordering on the channel region. The MOS element comprises also a plurality of substantially parallel gate trenches (12a - 12f) which extend as far as the drift region and which are provided with an electrically conductive material which is insulated from the transistor region by an insulator. The individual gate trenches are linked via a connecting gate trench (22a, 22b). A gate contact is linked with the active gate trenches in a electrically conductive manner merely by way of contact holes in the connecting gate trench. For producing said element only three photolithographic steps are required, namely etching the gate trenches and the connecting gate trench, producing the contact holes for the source region and the channel region and the connecting gate trench and for the final structuring of the gate contact (24 and the source contact (20). The invention provides a flexible layout which facilitates placing the gate contact (24) also in the middle or at another location of the power MOS element without additional costs and/or effort. Optionally, margin limiting structures (26a, 26b) can be produced in the form of circumferential floating rings or of floating magnetoresistors in parallel to the production of the active transistor region without additional process steps.
(FR)
Composant de puissance MOS qui comporte une zone de migration à dopage d'un premier type, une zone canal à dopage d'un deuxième type qui est complémentaire au dopage du premier type, la zone de canal étant adjacente à la zone de dérive, et une zone source à dopage du premier type, ladite zone source étant adjacente à la zone canal. Ledit composant comporte en outre une pluralité de tranchées de grille (12a 12f) essentiellement parallèles qui s'étendent jusqu'à la zone de migration et possèdent une matière électriquement conductrice qui est isolée de la zone transistor par un isolateur. Les tranchées de grille individuelles sont reliées par une tranchée de grille de raccordement (22a, 22b), un contact de grille n'étant relié de manière électriquement conductrice aux tranchées de grille actives que par l'intermédiaire de trous de contact situés dans la tranchée de grille de raccordement. Pour la fabrication dudit composant, il suffit de procéder à trois étapes de photogravure qui sont destinées à l'attaque chimique des tranchées de grille et de la tranchée de grille de raccordement, à la réalisation des trous de contact pour la zone source et la zone canal, ainsi que pour la tranchée de grille de raccordement, et pour la structuration finale du contact (24) de grille et du contact (20) de source. Ledit procédé permet une conception souple du tracé, selon laquelle le contact (24) de grille peut être placé sans complications supplémentaires au milieu ou dans un autre endroit du composant de puissance MOS. Eventuellement, des structures de terminaison de bordures (26a, 26b) peuvent être fabriquées parallèlement à la formation de la zone de transistor active sans étape supplémentaire de processus, sous forme d'anneaux circonférentiels flottants ou de magnétorésistances flottantes.
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