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1. WO2000041219 - METHOD AND DEVICE FOR PROCESSING COMPONENTS, NOTABLY SEMICONDUCTOR CHIPS, ARRANGED ON A SUBSTRATE

Publication Number WO/2000/041219
Publication Date 13.07.2000
International Application No. PCT/CH1999/000621
International Filing Date 22.12.1999
Chapter 2 Demand Filed 13.06.2000
IPC
H01L 21/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 21/56 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
31characterised by the arrangement
CPC
H01L 21/563
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
H01L 21/67126
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
67005Apparatus not specifically provided for elsewhere
67011Apparatus for manufacture or treatment
67126Apparatus for sealing, encapsulating, glassing, decapsulating or the like
H01L 21/67132
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
67005Apparatus not specifically provided for elsewhere
67011Apparatus for manufacture or treatment
67132Apparatus for placing on an insulating substrate, e.g. tape
H01L 2224/73203
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73201on the same surface
73203Bump and layer connectors
H01L 2224/83136
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
83using a layer connector
8312Aligning
83136involving guiding structures, e.g. spacers or supporting members
H01L 23/3114
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
3107the device being completely enclosed
3114the device being a chip scale package, e.g. CSP
Applicants
  • ALPHASEM AG [CH/CH]; Andhauserstrasse 64 CH-8572 Berg, CH
Inventors
  • WIRZ, Gustav; CH
Agents
  • WENGER, René; Hepp, Wenger & Ryffel AG Friedtalweg 5 CH-9500 Wil, CH
Priority Data
99112660.802.07.1999EP
99810009.307.01.1999EP
Publication Language German (DE)
Filing Language German (DE)
Designated States
Title
(DE) VERFAHREN UND VORRICHTUNG ZUM BEHANDELN VON AUF EINEM SUBSTRAT ANGEORDNETEN BAUTEILEN, INSBESONDERE VON HALBLEITERCHIPS
(EN) METHOD AND DEVICE FOR PROCESSING COMPONENTS, NOTABLY SEMICONDUCTOR CHIPS, ARRANGED ON A SUBSTRATE
(FR) PROCEDE ET DISPOSITIF DE TRAITEMENT DE COMPOSANTS DISPOSES SUR UN SUBSTRAT, EN PARTICULIER DE PUCES DE SEMI-CONDUCTEUR
Abstract
(DE)
Auf einem Substrat (2) werden mehrere Bauteile (1) zu einer Gruppe (4) abgesetzt. Anschliessend wird die ganze Gruppe gleichzeitig mit Hilfe eines Werkzeugs (3) einem Anpressdruck und einer Wärmebehandlung unterworfen. Das Werkzeug wird dabei gegen eine Substratauflage (8) gepresst. Zur Erzielung einer gleichförmigen Auflageraft auf die einzelnen Bauteile einer Gruppe ist für jedes Bauteil ein separater Stössel (7) vorgesehen. Die Stössel sind im Werkzeug (3) in Bewegungsrichtung des Werkzeugs (c) verschiebbar gelagert.
(EN)
According to the invention several components (1) are deposited on a substrate (2) such that they form a group (4). The entire group is then simultaneously subjected to a surface pressure and a heat treatment by means of a tool (3), which to this end is pressed against a substrate support (8). To ensure that the individual components of a group are subjected to a uniform pressing force a separate plunger (7) is provided for each component. The plungers are mounted in the tool (3) such that they can be displaced in the direction of movement (c) of the tool.
(FR)
Plusieurs composants (1) sont déposés sur un substrat (2), pour former un groupe (4). Ensuite, le groupe entier est soumis, en même temps, à une pression et à un traitement thermique, à l'aide d'un outil (3). L'outil est alors pressé contre un support de substrat (8). Pour obtenir une force d'appui uniforme sur chaque composant d'un groupe, on prévoit un poussoir individuel (7) pour chaque composant. Les poussoirs sont disposés de façon à coulisser selon la direction de déplacement de l'outil (c).
Other related publications
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