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1. WO2000041192 - PHOTODEFINED INTEGRAL CAPACITOR WITH SELF-ALIGNED DIELECTRIC AND ELECTRODES AND METHOD THEREFOR

Publication Number WO/2000/041192
Publication Date 13.07.2000
International Application No. PCT/US1999/028536
International Filing Date 02.12.1999
IPC
H05K 1/16 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
16incorporating printed electric components, e.g. printed resistor, capacitor, inductor
H05K 3/00 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
H05K 3/06 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
02in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
06the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
H05K 3/46 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
46Manufacturing multi-layer circuits
CPC
H05K 1/162
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
16incorporating printed electric components, e.g. printed resistor, capacitor, inductor
162incorporating printed capacitors
H05K 2201/0187
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
01Dielectrics
0183Dielectric layers
0187with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
H05K 2201/09509
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
09Shape and layout
09209Shape and layout details of conductors
095Conductive through-holes or vias
09509Blind vias, i.e. vias having one side closed
H05K 3/0023
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
0011Working of insulating substrates or insulating layers
0017Etching of the substrate by chemical or physical means
0023by exposure and development of a photosensitive insulating layer
H05K 3/064
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
02in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
06the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
061Etching masks
064Photoresists
H05K 3/4644
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
46Manufacturing multilayer circuits
4644by building the multilayer layer by layer, i.e. build-up multilayer circuits
Applicants
  • MOTOROLA INC. [US/US]; 1303 East Algonquin Road Schaumburg, IL 60196, US
Inventors
  • DUNN, Gregory, J.; US
  • SAVIC, Jovica; US
  • BEUHLER, Allyson; US
  • ZHANG, Min-Xian; US
  • SIMONS, Everett; US
Agents
  • FEKETE, Douglas, D. ; Motorola Inc. Intellectual Property Dept. 1303 East Algonquin Road Schaumburg, IL 60196, US
Priority Data
09/224,33831.12.1998US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) PHOTODEFINED INTEGRAL CAPACITOR WITH SELF-ALIGNED DIELECTRIC AND ELECTRODES AND METHOD THEREFOR
(FR) CONDENSATEUR INTEGRE A PHOTODEFINITION AVEC REGIONS DIELECTRIQUES ET ELECTRODES A AUTO-ALIGNEMENT, ET SON PROCEDE DE FABRICATION
Abstract
(EN)
A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions, for example, for producing integral capacitors (32), generally entails providing a substrate (10) with a first conductive layer (12), forming a dielectric layer (14) on the first conductive layer, and then forming a second conductive layer on the dielectric layer (16). A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
(FR)
Cette invention concerne un procédé de fabrication d'ensembles micro-électriques présentant des régions conductrices et diélectriques alignées, par exemple des condensateurs intégrés (32). De façon générale, ce procédé consiste à déposer sur un substrat (10) une première couche conductrice (12), à former une couche diélectrique (14) sur la première couche conductrice, puis à former une seconde couche conductrice sur la couche diélectrique (16). On retire ensuite une première région de la seconde couche conductrice pour exposer et également retirer une première région de la première région conductrice. Selon ce procédé, on retire les premières régions des couches conductrices et diélectriques en utilisant la ou les couches supérieures comme masques de manière à donner les mêmes dimensions aux secondes régions restantes de ces couches.
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