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1. WO2000039853 - VERTICALLY INTEGRATED SEMICONDUCTOR ARRANGEMENT

Publication Number WO/2000/039853
Publication Date 06.07.2000
International Application No. PCT/DE1999/004032
International Filing Date 20.12.1999
Chapter 2 Demand Filed 26.05.2000
IPC
H01L 23/64 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for
64Impedance arrangements
H01L 25/065 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/78
H01L 25/18 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
CPC
H01F 17/0006
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
17Fixed inductances of the signal type
0006Printed inductances
H01L 2224/16265
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16265the item being a discrete passive component
H01L 2225/06513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
06503Stacked arrangements of devices
06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
H01L 2225/06541
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
06503Stacked arrangements of devices
06541Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
H01L 23/645
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for ; , e.g. in combination with batteries
64Impedance arrangements
645Inductive arrangements
H01L 25/0657
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
03all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
0657Stacked arrangements of devices
Applicants
  • INFINEON TECHNOLOGIES AG [DE/DE]; St.-Martin-Strasse 53 D-81541 München, DE (AllExceptUS)
  • PAPADOPOULOS, Constantin [GR/DE]; DE (UsOnly)
Inventors
  • PAPADOPOULOS, Constantin; DE
Agents
  • SCHWEIGER, Martin; Leopoldstrasse 77 80802 München, DE
Priority Data
198 60 077.123.12.1998DE
Publication Language German (DE)
Filing Language German (DE)
Designated States
Title
(DE) VERTIKAL INTEGRIERTE HALBLEITERANORDNUNG
(EN) VERTICALLY INTEGRATED SEMICONDUCTOR ARRANGEMENT
(FR) SYSTEME DE SEMI-CONDUCTEUR INTEGRE VERTICALEMENT
Abstract
(DE)
Die Erfindung schlägt eine vertikal integrierte Halbleiteranordnung mit einem ersten Halbleiterchip (1) und zumindest einem zweiten Halbleiterchip (2, 3), die übereinanderliegend angeordnet sind, vor, wobei zumindest ein Halbleiterchip eine integrierte Schaltung aufweist und zumindest ein Halbleiterchip als passives Bauelement ausgebildet ist.
(EN)
The invention relates to a vertically integrated semiconductor arrangement with a first semiconductor chip and at least a second semiconductor chip which are arranged on top of each other. At least one semiconductor chip is provided with an integrated circuit and at least one semiconductor chip is embodied as a passive component.
(FR)
L'invention concerne un système de semi-conducteur intégré verticalement, comprenant une première puce à semi-conducteur et au moins une deuxième puce à semi-conducteur, placées l'une au-dessus de l'autre. Au moins une puce à semi-conducteur comporte un circuit intégré et au moins une puce à semi-conducteur se présente sous forme de composant passif.
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