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1. WO2000039685 - FLEXIBLE MEMORY CHANNEL

Publication Number WO/2000/039685
Publication Date 06.07.2000
International Application No. PCT/SE1999/002339
International Filing Date 14.12.1999
Chapter 2 Demand Filed 07.07.2000
IPC
G06F 12/00 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
G06F 12/02 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
G06F 13/14 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
G06F 13/28 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
20for access to input/output bus
28using burst mode transfer, e.g. direct memory access, cycle steal
G06T 1/20 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
1General purpose image data processing
20Processor architectures; Processor configuration, e.g. pipelining
CPC
G06F 13/1684
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
16for access to memory bus
1668Details of memory controller
1684using multiple buses
Applicants
  • AXIS AB [SE/SE]; Scheelevägen 16 S-223 70 Lund, SE
Inventors
  • SANDSTRÖM, Stefan; SE
  • LUNDBERG, Stefan; SE
Agents
  • STRÖM, Tore ; Ström & Gulliksson AB P.O. Box 4188 S-203 13 Malmö, SE
Priority Data
9804529-723.12.1998SE
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) FLEXIBLE MEMORY CHANNEL
(FR) VOIE MEMOIRE FLEXIBLE
Abstract
(EN)
A memory channel means (2), transferring data streams between different blocks (1, 3-15) and an internal memory means (1) on a data chip, wherein said memory channel means (2) comprises several memory channels (MC1-MC6). Each channel has source and destination data stream interfaces, wherein each interface is connectable to different blocks (1, 3-15), and a flexible address generator (16, 19) generating source and destination addresses for the internal memory means (1), wherein the order of the data being transferred is changed.
(FR)
L'invention concerne un moyen voie mémoire (2), transférant des flux de données entre différents blocs (1, 3-15) et un moyen mémoire interne (1) sur une puce données, ce moyen voie mémoire (2) comprenant plusieurs voies mémoire (MC1-MC6). Chaque voie a des interfaces flux de données source et de destination, chaque interface étant connectée à différents blocs (1, 3-15), et un générateur d'adresse flexible (16, 19) générant des adresses source et de destination pour les moyens mémoire interne (1), l'ordre des données transférées étant modifié.
Also published as
KR1020017008074
Latest bibliographic data on file with the International Bureau