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Machine translation
1. (WO2000025559) METHOD FOR MANUFACTURING A CIRCUIT BOARD
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2000/025559    International Application No.:    PCT/SE1999/001936
Publication Date: 04.05.2000 International Filing Date: 26.10.1999
Chapter 2 Demand Filed:    27.04.2000    
IPC:
H01L 23/13 (2006.01), H01L 23/538 (2006.01), H05K 1/18 (2006.01), H05K 3/00 (2006.01), H05K 3/34 (2006.01), H05K 3/46 (2006.01)
Applicants: TELEFONAKTIEBOLAGET LM ERICSSON [SE/SE]; S-126 25 Stockholm (SE)
Inventors: SÖDERHOLM, Mats; (SE)
Agent: GÖTEBORGS PATENTBYRÅ DAHLS AB; Sjöporten 4 S-417 64 Göteborg (SE)
Priority Data:
9803670-0 26.10.1998 SE
Title (EN) METHOD FOR MANUFACTURING A CIRCUIT BOARD
(FR) PROCEDE DE FABRICATION D'UNE CARTE A CIRCUITS
Abstract: front page image
(EN)The present invention refers to a method when manufacturing a circuit board (10), specially a multilayer circuit board (10). The method is provided to protect a surface coating of a cavity (11) by preventing harmful production material floating into the cavity through one or more via holes (13, 13') arranged in said cavity (11), said cavity being arranged for receiving an electric component. The via holes during the production of at least each layer of said circuit board are filled with an agent, resistant to said harmful material and also resistant to subsequent soldering.
(FR)L'invention concerne un procédé à mettre en oeuvre pendant la fabrication d'une carte (10) à circuits, et plus particulièrement d'une carte (10) multicouches. Ce procédé permet de protéger le revêtement de surface d'une cavité (11) en empêchant les matériaux de fabrication nuisibles de parvenir à l'intérieur de la cavité à travers un ou plusieurs trous (13, 13') d'interconnexion disposés dans cette cavité (11), cette dernière étant conçue pour recevoir un composant électrique. Pendant la production de chaque couche au moins, on remplit les trous d'interconnexion avec un agent qui résiste à ce matériau nuisible ainsi qu'au soudage qui suit.
Designated States: AE, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, CA, CH, CN, CR, CU, CZ, DE, DK, DM, EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, KG, KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG, MK, MN, MW, MX, NO, NZ, PL, PT, RO, RU, SD, SE, SG, SI, SK, SL, TJ, TM, TR, TT, TZ, UA, UG, UZ, VN, YU, ZA, ZW.
African Regional Intellectual Property Organization (GH, GM, KE, LS, MW, SD, SL, SZ, TZ, UG, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)