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Machine translation
1. (WO1999041685) A METHOD FOR MANUFACTURING AND DESIGNING AN ELECTRONIC DEVICE AND ELECTRONIC APPARATUS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1999/041685    International Application No.:    PCT/RU1998/000042
Publication Date: 19.08.1999 International Filing Date: 17.02.1998
Chapter 2 Demand Filed:    31.08.1999    
IPC:
G06F 17/50 (2006.01)
Applicants: MOTOROLA INC. [US/US]; 1301 E. Algonquin Road Schaumburg, IL 60196 (US) (For All Designated States Except US).
MARCHENKO, Alexandr M. [RU/RU]; (RU) (For US Only).
PLIS, Andrei P. [RU/RU]; (RU) (For US Only).
VIJAYAN, Gopal [IN/US]; (US) (For US Only)
Inventors: MARCHENKO, Alexandr M.; (RU).
PLIS, Andrei P.; (RU).
VIJAYAN, Gopal; (US)
Agent: RYBAKOV, Vladimir M.; Agency of Patent Attorneys "ARS-PATENT" Shvedsky per. 2/331 P.O. Box 230 St-Petersburg, 191186 (RU).
RICHARDT, Markus, A.; Motorola GmbH Hagenauer Strasse 47 D-65203 Wiesbaden (DE)
Priority Data:
Title (EN) A METHOD FOR MANUFACTURING AND DESIGNING AN ELECTRONIC DEVICE AND ELECTRONIC APPARATUS
(FR) PROCEDE DE FABRICATION ET DE CONCEPTION D'UN DISPOSITIF ELECTRONIQUE ET APPAREIL ELECTRONIQUE
Abstract: front page image
(EN)The invention relates to a method for manufacturing of electronic devices, such as very large scale integrated devices, having a channel. The channel routing is done based on a compositional approach in which initially all individual terminals are represented by individual nodes in a terminal vertical constraint graph. Individual constraints between individual terminals are represented by separate edges. This approach allows to resolve difficult classes of routing problems in an efficient way.
(FR)Cette invention concerne un procédé permettant de fabriquer des dispositifs électroniques, tels que des dispositifs intégrés de très grande taille, qui comportent un canal. Le routage du canal se fait selon une démarche qui repose sur la composition et au cours de laquelle toutes les bornes individuelles sont dans un premier temps représentées par des noeuds individuels dans un graphique de contraintes verticales des bornes. Les contraintes individuelles entre des bornes individuelles sont représentées par des bords distincts. Cette démarche permet de résoudre efficacement des cas difficiles de problèmes de routage.
Designated States: JP, KR, SG, US.
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE).
Publication Language: English (EN)
Filing Language: English (EN)