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1. (WO1999007018) SEMICONDUCTOR STRUCTURE WITH A SILICON CARBIDE MATERIAL BASE, WITH SEVERAL ELECTRICALLY DIFFERENT SUB-REGIONS
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/1999/007018 International Application No.: PCT/DE1998/002108
Publication Date: 11.02.1999 International Filing Date: 27.07.1998
Chapter 2 Demand Filed: 05.02.1999
IPC:
H01L 21/04 (2006.01) ,H01L 29/06 (2006.01) ,H01L 29/10 (2006.01) ,H01L 29/24 (2006.01) ,H01L 29/78 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
24
including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20 or H01L29/22246
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
Applicants: PETERS, Dethard[DE/DE]; DE (UsOnly)
SCHÖRNER, Reinhold[DE/DE]; DE (UsOnly)
SIEMENS AKTIENGESELLSCHAFT[DE/DE]; Wittelsbacherplatz 2 D-80333 München, DE (AllExceptUS)
Inventors: PETERS, Dethard; DE
SCHÖRNER, Reinhold; DE
Common
Representative:
SIEMENS AKTIENGESELLSCHAFT; Postfach 22 16 34 D-80506 München, DE
Priority Data:
197 33 076.231.07.1997DE
Title (EN) SEMICONDUCTOR STRUCTURE WITH A SILICON CARBIDE MATERIAL BASE, WITH SEVERAL ELECTRICALLY DIFFERENT SUB-REGIONS
(FR) STRUCTURE A SEMI-CONDUCTEURS A BASE DE CARBURE DE SILICIUM, DOTEE DE PLUSIEURS ZONES PARTIELLES A PROPRIETES ELECTRIQUES DISTINCTES
(DE) HALBLEITERSTRUKTUR AUF BASIS VON SILIZIUM-CARBID-MATERIAL MIT MEHREREN ELEKTRISCH UNTERSCHIEDLICHEN TEILGEBIETEN
Abstract:
(EN) The inventive SiC semiconductor structure (2) contains at least three semiconductor regions (G1 to G3). The surface of the third semiconductor region (G3) encompasses that of the second semiconductor region (G2), forming a second sub-surface (F2) which in turn encompasses the surface of the first semiconductor region (G1), forming a first sub-surface (F1). According to the invention, the contour of the edge (R2) of the second sub-surface (F2) should be determined by the contour of the edge (R1) of the first sub-surface (F1) in such a way that the second sub-surface (F2) essentially represents a specially enlarged image of the first sub-surface (F1). The deviation of the contour of the edge (R2) of the second sub-surface (F2) from the resulting exact contour (Re) of the image is at most $g(D)2 = 10 nm.
(FR) Structure (2) à semi-conducteurs en SiC qui comporte au moins trois zones (G1 à G3) à semi-conducteurs. La surface de la troisième zone (G3) englobe celle de la deuxième zone (G2) en tant que deuxième surface partielle (F2) qui, à son tour, renferme la surface de la première zone (G1) en tant que première surface partielle (F1). Selon la présente invention, le tracé du bord (R2) de la deuxième zone partielle (F2) doit être déterminé par le tracé du bord (R1) de la première surface partielle (F1) en cela que la deuxième surface partielle peut être représentée pour l'essentiel comme une réplique spécialement agrandie de la première surface partielle. L'écart ($g(D)a) du tracé du bord (R2) de la deuxième surface partielle (F2) par rapport au tracé exact (Re) découlant de la réplique est au plus de $g(D)2 = 10 nm.
(DE) Die SiC-Halbleiterstruktur (2) enthält zumindest drei Halbleitergebiete (G1 bis G3). Dabei umfaßt die Oberfläche des dritten Halbleitergebietes (G3) die des zweiten Halbleitergebietes (G2) als eine zweite Teilfläche (F2), die ihrerseits die Oberfläche des ersten Halbeitergebiets (G1) als eine erste Teilfläche (F1) umschließt. Erfindungsgemäß soll die Kontur des Randes (R2) der zweiten Teilfläche (F2) durch die Kontur des Randes (R1) der ersten Teilfläche (F1) dahingehend bestimmt sein, daß die zweite Teilfläche (F2) im wesentlichen als ein speziell vergrößertes Abbild der ersten Teilfläche (F1) darstellbar ist, wobei die Abweichung der Kontur des Randes (R2) der zweiten Teilfläche (F2) von der sich bei der Abbildung ergebenden exakten Kontur (Re) höchstens $g(D)2 = 10 nm beträgt.
front page image
Designated States: CN, JP, US
European Patent Office (EPO) (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: German (DE)
Filing Language: German (DE)