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1. (WO1998052220) PROCESS FOR MANUFACTURING SEMICONDUCTOR PACKAGE AND CIRCUIT BOARD ASSEMBLY
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/052220 International Application No.: PCT/JP1998/001905
Publication Date: 19.11.1998 International Filing Date: 24.04.1998
IPC:
H01L 21/56 (2006.01) ,H01L 23/31 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56
Encapsulations, e.g. encapsulating layers, coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
Applicants:
CITIZEN WATCH CO., LTD. [JP/JP]; 1-1, Nishi-Shinjuku 2-chome Shinjuku-ku Tokyo 163-0428, JP (AT, BE, CH, CN, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, KR, LU, MC, NL, PT, SE)
ISHIDA, Yoshihiro [JP/JP]; JP (UsOnly)
SHIMIZU, Kiyoshi [JP/JP]; JP (UsOnly)
SATO, Tetsuo [JP/JP]; JP (UsOnly)
NISHIKATA, Shinichi [JP/JP]; JP (UsOnly)
ISHIWATA, Shuichi [JP/JP]; JP (UsOnly)
OMURA, Atsushi [JP/JP]; JP (UsOnly)
OHARA, Tsutomu [JP/JP]; JP (UsOnly)
Inventors:
ISHIDA, Yoshihiro; JP
SHIMIZU, Kiyoshi; JP
SATO, Tetsuo; JP
NISHIKATA, Shinichi; JP
ISHIWATA, Shuichi; JP
OMURA, Atsushi; JP
OHARA, Tsutomu; JP
Agent:
WATANABE, Kihei; Daiichi NS Building 5th floor 32, Kanda Suda-cho 1-chome Chiyoda-ku Tokyo 101-0041, JP
Priority Data:
9/11922009.05.1997JP
9/15868816.06.1997JP
9/15868916.06.1997JP
9/25650322.09.1997JP
9/29531728.10.1997JP
Title (EN) PROCESS FOR MANUFACTURING SEMICONDUCTOR PACKAGE AND CIRCUIT BOARD ASSEMBLY
(FR) PROCEDE DE PRODUCTION D'UN BOITIER POUR SEMI-CONDUCTEUR ET SYSTEME DE CARTE DE CIRCUITS
Abstract:
(EN) A process for manufacturing a semiconductor package comprising the steps of: sticking a package assembly (100a) on a refence member (8), the assembly (100a) being prepared via a board circuit-forming step, an IC chip-mounting step, a resin-sealing step and an electrode-forming step; and cutting the package assembly thus stuck into separate circuit boards (1) by dicing.
(FR) L'invention concerne un procédé permettant de produire un boîtier pour semi-conducteur qui comprend plusieurs étapes. Un boîtier pour semi-conducteur (100a) est monté sur un élément de référence (8), ledit boîtier (100a) étant obtenu en passant par une étape de formation d'une carte de circuits, une étape de montage de puce à CI, une étape de scellement par résine et une étape de formation d'électrode. Le boîtier est ensuite découpé ainsi immobilisé en circuits intégrés (1) séparés par découpage en dés.
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Designated States: CN, KR, US
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
KR1020000023622EP0932198EP2015359US6365438CN1225750