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1. (WO1998052112) BIAS GENERATOR FOR A LOW CURRENT DIVIDER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/052112 International Application No.: PCT/IB1998/000640
Publication Date: 19.11.1998 International Filing Date: 27.04.1998
IPC:
G05F 3/24 (2006.01)
G PHYSICS
05
CONTROLLING; REGULATING
F
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
3
Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
02
Regulating voltage or current
08
wherein the variable is dc
10
using uncontrolled devices with non-linear characteristics
16
being semiconductor devices
20
using diode-transistor combinations
24
wherein the transistors are of the field-effect type only
Applicants:
KONINKLIJKE PHILIPS ELECTRONICS N.V. [NL/NL]; Groenewoudseweg 1 NL-5621 BA Eindhoven, NL
PHILIPS AB [SE/SE]; Kottbygatan 7 Kista S-164 85 Stockholm, SE (SE)
Inventors:
WOMACK, Richard, H.; NL
Agent:
KOPPEN, Jan; Internationaal Octrooibureau B.V. P.O. Box 220 NL-5600 AE Eindhoven, NL
Priority Data:
08/854,71212.05.1997US
Title (EN) BIAS GENERATOR FOR A LOW CURRENT DIVIDER
(FR) CIRCUIT DIVISEUR DE TENSION
Abstract:
(EN) A voltage divider is protected from current paths created by parasitic devices. The voltage divider includes a first string of diode-connected MOS transistors and a second string of diode-connected MOS transistors. A substrate bias terminal of each transistor in the first string is coupled to a substrate bias terminal of a corresponding transistor in the second string. The first string of transistors provides an output voltage which is protected from current paths created by parasitic devices.
(FR) Un diviseur de tension est protégé des passages de courant créés par des dispositifs parasites. Ledit diviseur de tension comporte une première et une deuxième chaîne de transistors MOS montés en diodes. Une borne de polarisation de substrat de chaque transistor de la première chaîne est couplée à une borne de polarisation de substrat du transistor correspondant de la deuxième chaîne. La première chaîne de transistors produit une tension de sortie qui est protégée des passages de courant créés par des dispositifs parasites.
Designated States: JP
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP0919020JP2000514939