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1. (WO1998050961) HETEROJUNCTION BIPOLAR TRANSISTOR HAVING HETEROSTRUCTURE BALLASTING EMITTER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/050961 International Application No.: PCT/US1998/009472
Publication Date: 12.11.1998 International Filing Date: 08.05.1998
Chapter 2 Demand Filed: 09.12.1998
IPC:
H01L 29/08 (2006.01) ,H01L 29/737 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
08
with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
73
Bipolar junction transistors
737
Hetero-junction transistors
Applicants:
YANG, Edward, S. [US/US]; US
YANG, Yue-Fei [CN/US]; US
Inventors:
YANG, Edward, S.; US
YANG, Yue-Fei; US
Agent:
MILLER, Charles, E.; Pennie & Edmonds LLP 1155 Avenue of the Americas New York, NY 10036, US
Priority Data:
08/853,23809.05.1997US
Title (EN) HETEROJUNCTION BIPOLAR TRANSISTOR HAVING HETEROSTRUCTURE BALLASTING EMITTER
(FR) TRANSISTOR BIPOLAIRE A HETEROJONCTION AVEC EMETTEUR DE PROTECTION A HETEROSTRUCTURE
Abstract:
(EN) An HBT device having heterostructure ballasting emitter is disclosed. The heterostructure ballasting emitter include an n-type emitter setback layer (14) on a base layer (13) and a wide-gap ballasting emitter layer (15) on the setback layer (14). The heterostructure ballasting emitter layer (15) is made so that the band gap of the emitter setback layer (14) is equal to or larger than that of the base layer (13) and the band gap of the ballasting emitter layer (15) is larger than that of the emitter setback layer (14). The heterostructure of the emitter set back layer (14) and the ballasting emitter layer (15) serves as the ballast. By changing the value of the valance offset between the emitter setback layer (14) and the ballasting emitter layer (15), the temperature dependence of the current gain becomes adjustable. As a consequence, the present invention overcomes hurdles posed by the current gain collapse and a negative differential resistance and improves the use of the HBTs in microwave power applications.
(FR) L'invention concerne un transistor bipolaire à hétérojonction (HBT) pourvu d'un émetteur de protection à hétérostructure. Cet émetteur de protection à hétérostructure comprend une couche setback d'émission de type N (14), placée sur une couche de base (13), et un couche d'émetteur de protection à largeur de bande interdite (15), placée sur ladite couche setback d'émission (14). La couche d'émission de protection à hétérostructure (15) est disposée de manière à ce que la largeur de bande interdite de ladite couche setback d'émission (14) soit supérieure ou égale à celle de la couche de base (13), et la largeur de bande interdite de la couche d'émetteur de protection (15) supérieure à celle de la couche setback d'émission (14). L'hétérostructure de cette couche setback d'émission (14) et de la couche d'émission de protection (15) sert de ballast. En changeant la valeur du décalage de valence entre la couche setback d'émission (14) et la couche émetteur de protection (15), on peut ajuster la dépendance à la température du gain en courant. La présente invention permet donc de surmonter les problèmes liés à un effondrement du gain de courant et à une résistance différentielle négative: elle permet ainsi d'améliorer l'utilisation de HBT dans des applications de puissance hyperfréquence.
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Designated States: CA, JP, KR, SG
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)