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1. (WO1998050856) NON-INTRUSIVE POWER CONTROL FOR COMPUTER SYSTEMS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/050856 International Application No.: PCT/US1998/006341
Publication Date: 12.11.1998 International Filing Date: 31.03.1998
Chapter 2 Demand Filed: 23.11.1998
IPC:
G06F 11/00 (2006.01) ,G06F 11/16 (2006.01) ,G06F 11/18 (2006.01) ,G06F 15/177 (2006.01) ,H02H 3/05 (2006.01) ,H03K 19/003 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
16
Error detection or correction of the data by redundancy in hardware
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
16
Error detection or correction of the data by redundancy in hardware
18
using passive fault-masking of the redundant circuits, e.g. by quadding or by majority decision circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
15
Digital computers in general; Data processing equipment in general
16
Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
177
Initialisation or configuration control
H ELECTRICITY
02
GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
H
EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
3
Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection
02
Details
05
with means for increasing reliability, e.g. redundancy arrangements
[IPC code unknown for H03K 19/03]
Applicants:
GENERAL DYNAMICS INFORMATION SYSTEMS, INC. [US/US]; 8800 Queen Avenue Bloomington, MN 55431, US
Inventors:
FUCHS, Stephen; US
WARDROP, Andrew, J.; US
Agent:
BURTON, Carol, W. ; Holland & Hart L.L.P. Suite 3200 555 17th Street P.O. Box 8749 Denver, CO 80201-8749, US
Priority Data:
08/852,48707.05.1997US
Title (EN) NON-INTRUSIVE POWER CONTROL FOR COMPUTER SYSTEMS
(FR) COMMANDE D'ALIMENTATION SANS EFFETS PERTURBATEURS POUR SYSTEMES INFORMATIQUES
Abstract:
(EN) A non-intrusive power control for a fault tolerant computer system is disclosed which uses redundant voting at the hardware clock level. The computer (11a) includes Three, four or more commercial central processing units (CPUs) (32) operating synchronously. Outputs (33) to system memory (46) and system bus (12) are voted by a radiation tolerant gate array (50) which may be implemented in a custom integrated circuit (34). An interface control (28) coupled to the voter (34) can remove or connect power from a CPU (32) and adjust CPU inputs (33i), preventing damage to the components without terminating an operating program. The inputs and outputs (35) at each write to and read from system memory (46) are voted at each CPU clock cycle. A vote status and control circuit (38) 'reads' the status of the vote and controls the state of the CPUs using hardware and software. The system logic selects the best chance of recovering from a detected fault by re-synchronizing all CPUs (32) powering down a faulty CPU (32), or swithching to a spare computer (11b), resetting and re-booting the substituted CPUs (32).
(FR) La présente invention se rapporte à une commande d'alimentation pour un système informatique insensible aux pannes, utilisant un vote redondant au niveau de l'horloge matériel. L'ordinateur (11a) comprend trois ou quatre unités centrales (UC) commerciales (32), voire plus, fonctionnant de manière synchrone. Des sorties (33) vers la mémoire système (46) et un bus système (12) sont votées par une matrice de portes prédiffusées (50) insensible au rayonnement et pouvant être mise en application dans un circuit intégré personnalisé (34). Une commande d'interface (28) couplée à l'unité de vote (34) peut couper ou connecter l'alimentation depuis une unité centrale (32) et ajuster les entrées UC (33i) pour éviter la détérioration des composants, sans couper un programme d'exploitation. Les entrées et les sorties (35) à chaque écriture et lecture en mémoire système (46) sont votées à chaque cycle d'horloge UC. Un circuit (38) d'état et de commande de vote 'affiche' le résultat de vote et commande l'état de l'UC en utilisant le matériel et le logiciel. La logique système choisit la meilleure possibilité permettant le redémarrage après détection d'une panne, en resynchronisant toutes les UC (32), en coupant l'alimentation d'une UC défectueuse, en basculant vers un ordinateur de réserve (11b), et enfin, en remettant à zéro et en réinitialisant les UC de départ (32).
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Designated States: CN, IL, JP, KR
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
KR1020010012310IL132724EP0980546US6141770JP2001526809 CN1255211