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1. (WO1998049779) CONFIGURABLE SINGLE-CHIP TRANSCEIVER INTEGRATED CIRCUIT ARCHITECTURE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/049779 International Application No.: PCT/US1998/008820
Publication Date: 05.11.1998 International Filing Date: 30.04.1998
Chapter 2 Demand Filed: 17.11.1998
IPC:
H04B 1/40 (2006.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
B
TRANSMISSION
1
Details of transmission systems, not covered by a single one of groups H04B3/-H04B13/123; Details of transmission systems not characterised by the medium used for transmission
38
Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
40
Circuits
Applicants:
MOTOROLA INC. [US/US]; Chevron Corporation - Law Department P.o. Box 6006 San Ramon, CA 94583, US
Inventors:
MEADOR, Richard, B.; US
HANSEN, Kenneth, A.; US
KEHLER, Walter, H.; US
KURTZMAN, Gary, A.; US
ZELE, Rajesh, H.; US
Agent:
FULLER, Andrew, S. ; Motorola Inc. Intellectual Property Dept. 8000 West Sunrise Boulevard Fort Lauderdale, FL 33322, US
Priority Data:
08/847,64830.04.1997US
Title (EN) CONFIGURABLE SINGLE-CHIP TRANSCEIVER INTEGRATED CIRCUIT ARCHITECTURE
(FR) ARCHITECTURE CONFIGURABLE DE CIRCUIT INTEGRE MONOPUCE D'EMISSION/RECEPTION
Abstract:
(EN) A single-chip transceiver integrated circuit (100) has multiple on-chip circuits that implement receiver functions, transmitter functions, and audio processing functions. The IC (100) has interfaces (220, 240, 252, 270, 260, 245, 288, 290) which are situated among the on-chip circuits, and which couple one on-chip circuit to another. At least some of these on-chip interfaces (220, 240, 245, 252, 270) are configurable to couple an off-chip processing circuit to substitute for a corresponding on-chip circuit. In the preferred embodiment, the single-chip transceiver IC (100) supports radio configurations having off-chip versions of corresponding on-chip circuits for performing receiver front-end functions, synthesizer functions, reference oscillator functions, and audio processing functions.
(FR) L'invention porte sur un circuit intégré (100) monopuce d'émission/réception comportant plusieurs circuits sur puce assurant les fonctions de réception, d'émission et de traitement de signaux audio. Le CI (100) comporte des interfaces (220, 240, 252, 270, 260, 245, 288, 290) réparties entre les circuits sur puce et les reliant les uns aux autres. Certaines au moins de ces interfaces (220, 240, 245, 252, 270) sont configurables de manière à pouvoir se raccorder à un circuit de traitement se substituant au circuit sur puce correspondant. Dans l'exécution préférée, le circuit intégré (100) monopuce d'émission/réception comporte des structures radio présentant des versions hors puce de circuits correspondants de la puce assurant les fonctions de préamplification, de réception, de synthétisation, d'oscillateur de référence, et de traitement.
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Designated States: AL, AM, AT, AU, AZ, BB, BG, BR, BY, CA, CH, CN, CZ, DE, DK, EE, ES, FI, GB, GE, HU, IS, JP, KE, KG, KP, KR, KZ, LK, LR, LS, LT, LU, LV, MD, MG, MK, MN, MW, MX, NO, NZ, PL, PT, RO, RU, SD, SE, SG, SI, SK, TJ, TM, TR, TT, UA, UG, VN
African Regional Intellectual Property Organization (ARIPO) (GH, GM, KE, LS, MW, SD, SZ, UG, ZW)
European Patent Office (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP0979557CN1254457AU1998072736