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1. (WO1998049732) LATERAL MOS TRANSISTOR DEVICE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1998/049732 International Application No.: PCT/IB1998/000399
Publication Date: 05.11.1998 International Filing Date: 19.03.1998
IPC:
H01L 29/06 (2006.01) ,H01L 29/10 (2006.01) ,H01L 29/417 (2006.01) ,H01L 29/423 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
417
carrying the current to be rectified, amplified or switched
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
423
not carrying the current to be rectified, amplified or switched
Applicants:
KONINKLIJKE PHILIPS ELECTRONICS N.V. [NL/NL]; Groenewoudseweg 1 NL-5621 BA Eindhoven, NL
PHILIPS AB [SE/SE]; Kottbygatan 7 Kista S-164 85 Stockholm, SE (SE)
Inventors:
JOS, Hendrikus, Ferdinand, Franciscus; NL
Agent:
HOUBIERS, Ernest, E., M., G.; Internationaal Octrooibureau B.V. P.O. Box 220 NL-5600 AE Eindhoven, NL
Priority Data:
97201272.828.04.1997EP
Title (EN) LATERAL MOS TRANSISTOR DEVICE
(FR) DISPOSITIF TRANSISTOR MOS LATERAL
Abstract:
(EN) The invention relates to a lateral DMOST with a drain extension (8). The source contact entirely overlaps the gate and thus forms a screen between the gate and the drain in known transistors of this type. In the transistor proposed here, the source contact (15) does not overlap the poly gate (9) but lies entirely laterally of this gate. The gate itself is provided with a low-ohmic metal contact strip (18), which results in a low gate resistance. A metal screening strip (20) is provided between this gate contact strip and the metal drain contact (16), which screening strip is connected to the source contact (15) next to the tips of the contact strip (18). Said screening strip leads to a major improvement in the power gain at high frequencies, for example in the RF range. The screening strip (20) may be realized together with the source, drain, and gate contacts in a common metal layer.
(FR) Cette invention se rapporte à un transistor MOS à double diffusion latérale doté d'un prolongement à effet de drain (8). Dans les transistors classiques de ce type, le contact de source recouvre entièrement la grille et forme de ce fait un écran entre la grille et le drain. Dans le transistor de l'invention, le contact de source (15) ne recouvre pas la poly-grille (9) mais est disposée entièrement à côté de ladite grille. Cette grille est elle-même pourvue d'une bande de contact (18) métallique à faible valeur ohmique, ce qui se traduit par une faible résistance de grille. Une bande métallique (20) à effet d'écran, qui est disposée entre cette bande du contact de grille et le contact métallique (16) du drain, est reliée au contact de source (15) à proximité des extrémités de la bande de contact (18). Ladite bande à effet d'écran constitue un perfectionnement important pour le gain en puissance à hautes fréquences, par exemple dans le domaine des radiofréquences. Cette bande à effet d'écran (20) peut être fabriquée conjointement aux contacts de source, de drain et de grille dans une couche métallique commune.
Designated States: JP, KR
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
KR1020000022317EP0917738JP2000513877