The invention relates to a chip card (CK) which has a programme execution unit (P) and a non-volatile memory (PS). The memory locations (F11..Fm) of said memory allow a maximum number of write accesses. The memory (PS) has at least memory areas (F1..Fn) which are each allocated with a field of characteristics (z1..zn). These fields of characteristics each have a characteristic value (X, i..i+(n-1)Δ), the size of the characteristic value being a measure for the time sequence (F) of write accesses executed to the respective memory areas (F1..Fn). When a write access to the memory (PS) is executed the least recently accessed memory area (F2) is determined first, by means of evaluating said characteristic values. This is the memory area which is then accessed, the characteristic value (i) of the field of characteristics (z2) allocated to this memory area also being modified so that the designated memory area (F2) is then recognised as the most recently accessed. The invention presents the advantage that n x the maximum number of write accesses for an individual memory area can be executed in accordance with the number n of memory areas used. At the same time, a log is provided of previous write accesses.