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1. WO1998036378 - TAMPER RESISTANT SMART CARD AND METHOD OF PROTECTING DATA IN A SMART CARD

Publication Number WO/1998/036378
Publication Date 20.08.1998
International Application No. PCT/US1998/002356
International Filing Date 06.02.1998
Chapter 2 Demand Filed 11.09.1998
IPC
G06K 19/073 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards
07with integrated circuit chips
073Special arrangements for circuits, e.g. for protecting identification code in memory
CPC
G06K 19/073
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards ; also with resonating or responding marks without active components
07with integrated circuit chips
073Special arrangements for circuits, e.g. for protecting identification code in memory
G06K 19/07372
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards ; also with resonating or responding marks without active components
07with integrated circuit chips
073Special arrangements for circuits, e.g. for protecting identification code in memory
07309Means for preventing undesired reading or writing from or onto record carriers
07372by detecting tampering with the circuit
G06K 19/07381
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards ; also with resonating or responding marks without active components
07with integrated circuit chips
073Special arrangements for circuits, e.g. for protecting identification code in memory
07309Means for preventing undesired reading or writing from or onto record carriers
07372by detecting tampering with the circuit
07381with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
Applicants
  • MICRON COMMUNICATIONS, INC. [US]/[US] (AllExceptUS)
  • TUTTLE, John, R. [US]/[US] (UsOnly)
  • WOOD, Clifton, W., Jr. [US]/[US] (UsOnly)
  • MCCABE, Arthur, Barney [US]/[US] (UsOnly)
Inventors
  • TUTTLE, John, R.
  • WOOD, Clifton, W., Jr.
  • MCCABE, Arthur, Barney
Agents
  • MALHOTRA, Deepak
Priority Data
08/800,03713.02.1997US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) TAMPER RESISTANT SMART CARD AND METHOD OF PROTECTING DATA IN A SMART CARD
(FR) CARTE A PUCE INVIOLABLE ET PROCEDE DE PROTECTION DE DONNEES DANS UNE CARTE A PUCE
Abstract
(EN)
A method of protecting data in a smart card from unauthorized access, the method comprising providing a housing defined by first and second housing portions; employing a volatile memory in the smart card for storing the data, and supporting the volatile memory from the first housing portion; providing a power supply in the housing, the power supply maintaining the data in the volatile memory while the power supply is connected to the volatile memory; and connecting the power supply to the volatile memory using a conductor supported by and movable with the second housing portion. A smart card comprising a housing including two opposing major portions that are connected together; an integrated circuit supported in the housing, the integrated circuit including a microprocessor and a random access memory, the random access memory being used to store data; a battery supported in the housing and having first and second terminals, the first terminal being coupled to the integrated circuit; and a conductor coupling the second terminal of the battery to the integrated circuit to complete a circuit, the conductor being supported by the housing such that separation of one of the portions of the housing from the other portion opens the circuit and breaks connection of the battery to the microprocessor so that data held in the random access memory is erased.
(FR)
L'invention concerne un procédé de protection contre une utilisation illicite de données d'une carte à puce, carte qui comprend un corps défini par une première et une deuxième partie. Ce procédé consiste à utiliser une mémoire rémanente de la carte à puce pour stocker les données, cette mémoire étant supportée dans la première partie du corps; placer une alimentation électrique dans le corps de façon à conserver les données dans la mémoire rémanente au moment où la connexion électrique est raccordée à la mémoire rémanente; et connecter l'alimentation électrique à la mémoire rémanente à l'aide d'un conducteur supporté dans la seconde partie du corps et se déplaçant avec celle-ci. La carte à puce comprend un corps comportant deux parties principales opposées raccordées l'une à l'autre; un circuit intégré supporté dans le corps et comprenant un microprocesseur et une mémoire à accès sélectif utilisée pour stocker les données; une batterie supportée dans le corps et comportant des première et seconde bornes, la première étant couplée au circuit intégré; et un conducteur couplant la seconde borne de la batterie au circuit intégré pour terminer un circuit, ce conducteur étant supportée par le corps de sorte que la séparation d'une des parties du corps des autres parties ouvre le circuit et déconnecte la batterie du microprocesseur, les données ainsi conservées dans la mémoire à accès sélectif étant ainsi effacées.
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