Processing

Please wait...

Settings

Settings

Goto Application

1. WO1998015007 - INTEGRATED SEMICONDUCTOR STORAGE ASSEMBLY WITH BURIED-PLATE ELECTRODE

Publication Number WO/1998/015007
Publication Date 09.04.1998
International Application No. PCT/DE1997/002219
International Filing Date 26.09.1997
Chapter 2 Demand Filed 22.04.1998
IPC
H01L 27/108 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
108Dynamic random access memory structures
H01L 27/115 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
CPC
H01L 27/10805
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
108Dynamic random access memory structures
10805with one-transistor one-capacitor memory cells
H01L 27/10829
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
108Dynamic random access memory structures
10805with one-transistor one-capacitor memory cells
10829the capacitor being in a substrate trench
H01L 27/11502
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11502with ferroelectric memory capacitors
Applicants
  • SIEMENS AKTIENGESELLSCHAFT [DE]/[DE] (AllExceptUS)
  • SCHINDLER, Günther [DE]/[DE] (UsOnly)
  • MAZURE-ESPEJO, Carlos [DE]/[DE] (UsOnly)
Inventors
  • SCHINDLER, Günther
  • MAZURE-ESPEJO, Carlos
Priority Data
196 40 215.830.09.1996DE
Publication Language German (DE)
Filing Language German (DE)
Designated States
Title
(DE) INTEGRIERTE HALBLEITERSPEICHERANORDNUNG MIT 'BURIED-PLATE-ELEKTRODE'
(EN) INTEGRATED SEMICONDUCTOR STORAGE ASSEMBLY WITH BURIED-PLATE ELECTRODE
(FR) MEMOIRE A SEMICONDUCTEURS INTEGREE AVEC ELECTRODE A PLAQUE ENTERREE
Abstract
(DE)
Halbleiterspeicheranordnung, die eine Vielzahl Auswahltransistoren aufweist, die jeweils mit einer ersten Elektrode (16) eines Speicherkondensators verbunden sind, wobei eine zweite Elektrode (18) des Speicherkondensators mit einer gemeinsamen Platte (14) verbunden ist, wobei die gemeinsame Platte unterhalb der Auswahltransistoren in einem Halbleiterkörper angeordnet ist, wobei der Speicherkondensator an Seitenflächen einer Aussparung (26) der Isolationsschicht (10) über dem Source-Gebiet (4) angeordnet ist. Das Speicherdielektrikum (20) weist vorzugsweise ferroelektrische Eigenschaften auf.
(EN)
The invention relates to a semiconductor storage assembly, which has a plurality of selection transistors, each of them being connected to a first electrode (16) of a storage capacitor. A second electrode (18) of the storage capacitor is connected to a common plate (14) lodged on a semiconductor body under the selector transistors. The storage capacitor is placed on the side faces of a relief (26) of the insulating layer (10) over the source region (4). The storage dielectric (20) has preferably ferroelectric properties.
(FR)
Mémoire à semiconducteurs présentant une pluralité de transistors de sélection qui sont connectés chacun à une première électrode (16) d'un condensateur de mémorisation. Une deuxième électrode (18) du condensateur de mémorisation est raccordée à une plaque commune (14) placée sous les transistors de sélection dans un corps à semiconducteurs. Le condensateur de mémorisation est placé sur les faces latérales d'un évidement (26) de la couche isolante (10) au-dessus de la zone de source (4). Le diélectrique de mémorisation (20) présente de préférence des propriétés ferroélectriques.
Latest bibliographic data on file with the International Bureau