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1. WO1998013870 - CHIP MODULE AND MANUFACTURING PROCESS

Publication Number WO/1998/013870
Publication Date 02.04.1998
International Application No. PCT/DE1997/001805
International Filing Date 21.08.1997
Chapter 2 Demand Filed 20.01.1998
IPC
G06K 19/077 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards
07with integrated circuit chips
077Constructional details, e.g. mounting of circuits in the carrier
H01L 23/498 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488consisting of soldered or bonded constructions
498Leads on insulating substrates
H05K 3/34 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
30Assembling printed circuits with electric components, e.g. with resistor
32electrically connecting electric components or wires to printed circuits
34by soldering
CPC
G06K 19/07743
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards ; also with resonating or responding marks without active components
07with integrated circuit chips
077Constructional details, e.g. mounting of circuits in the carrier
07743External electrical contacts
G06K 19/07747
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
19Record carriers for use with machines and with at least a part designed to carry digital markings
06characterised by the kind of the digital marking, e.g. shape, nature, code
067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards ; also with resonating or responding marks without active components
07with integrated circuit chips
077Constructional details, e.g. mounting of circuits in the carrier
07745Mounting details of integrated circuit chips
07747at least one of the integrated circuit chips being mounted as a module
H01L 2224/05554
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
0555Shape
05552in top view
05554being square
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 2224/48227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48225the item being non-metallic, e.g. insulating substrate with or without metallisation
48227connecting the wire to a bond pad of the item
H01L 2224/49171
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
49of a plurality of wire connectors
491Disposition
4912Layout
49171Fan-out arrangements
Applicants
  • SIEMENS AKTIENGESELLSCHAFT [DE]/[DE] (AllExceptUS)
  • FISCHER, Jürgen [DE]/[DE] (UsOnly)
  • HEITZER, Josef [DE]/[DE] (UsOnly)
  • HUBER, Michael [DE]/[DE] (UsOnly)
  • PÜSCHNER, Frank [DE]/[DE] (UsOnly)
  • STAMPKA, Peter [DE]/[DE] (UsOnly)
Inventors
  • FISCHER, Jürgen
  • HEITZER, Josef
  • HUBER, Michael
  • PÜSCHNER, Frank
  • STAMPKA, Peter
Priority Data
196 39 025.723.09.1996DE
Publication Language German (DE)
Filing Language German (DE)
Designated States
Title
(DE) CHIPMODUL UND VERFAHREN ZUR HERSTELLUNG EINES CHIPMODULS
(EN) CHIP MODULE AND MANUFACTURING PROCESS
(FR) MODULE DE PUCE ELECTRONIQUE ET MODE DE FABRICATION
Abstract
(DE)
Die Erfindung bezieht sich auf ein Chipmodul mit einem auf seiner Außenseite (2) angeordneten Kontaktfeld (3) mit mehreren voneinander isolierten, im wesentlichen flachen Kontaktelementen (4) aus elektrisch leitendem Material, und mit wenigstens einem Halbleiterchip (6) mit einer oder mehreren integrierten Halbleiterschaltungen, welche über Verbindungsanschlüsse (8) mit den Kontaktelementen (4) des Kontaktfeldes (3) elektrisch verbunden ist bzw. sind. Die Kontaktelemente (4) des Chipmoduls (1) sind durch einen vorgefertigten Systemträger (20) ('Leadframe') zur Abstützung des wenigstens einen Halbleiterchips (6) und an wenigstens zwei gegenüberliegenden Seiten des Chipmoduls (1) durch nach außen abgestellte, reihenweise nebeneinanderliegend geführte Anschlüsse (8) für die Oberflächenmontage des Chipmoduls (1) auf der Bestückungsoberfläche (9) einer externen Leiterplatte bzw. einem externen Platinensubstrat (10) gebildet.
(EN)
The present invention pertains to a chip module presenting on its inner surface (2) a contact area (3) consisting of a plurality of electroconductive contact units (4) isolated from each other, substantially flat and including at least one semiconductor wafer (6) with one or more integrated semiconductor circuits, joined through electrical connections (8) to the units in the contact area (3). The contact units (4) in the chip module (1) consist of prefabricated mounts intended for supporting the lead frame or at least one semiconductor wafer (6), and, located on one or more opposing faces of the chip module, two or more connections turned outwards, aligned close to each other (8) and intended for the surface assembly of said chip module (1) either on the components side (9) of an external printed circuit board or on the surface of an external board substrate (10).
(FR)
La présente invention porte sur un module de puce présentant, sur sa face extérieure (2), une aire de contact (3) comprenant plusieurs éléments de contact (4) électroconductibles, isolés les uns des autres et sensiblement plats, et comportant moins une plaquette de semiconducteur (6) avec un ou plusieurs circuits semiconducteurs intégrés, raccordés par des connexions électriques (8) aux éléments (4) de l'aire de contact (3). Les éléments de contact (4) du module de puce (1) sont constitués par des supports (30) préfabriqués du réseau de conducteurs, destinés à soutenir au moins une plaquette de semiconducteur (6) et, sur au moins deux faces opposées du module de puce, par au moins deux raccords orientés vers l'extérieur et disposés en files les uns près des autres (8), destinés au montage du module de puce (1) sur la surface prévue pour l'insertion des composants (9) d'une plaquette externe de circuits imprimés ou sur la surface d'un substrat extérieur (10).
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