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1. WO1997048054 - DEADLOCK-FREE MESSAGE-PASSING SYSTEM FOR MIMD COMPUTER PROCESSING SYSTEMS UTILIZING A CSP PROGRAMMING MODEL

Publication Number WO/1997/048054
Publication Date 18.12.1997
International Application No. PCT/US1996/011583
International Filing Date 12.07.1996
Chapter 2 Demand Filed 12.02.1997
IPC
G06F 15/173 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general; Data processing equipment in general
16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
163Interprocessor communication
173using an interconnection network, e.g. matrix, shuffle, pyramid, star or snowflake
H04L 12/701 2013.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
70Packet switching systems
701Routing or path finding
CPC
G06F 15/17381
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
163Interprocessor communication
173using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
17356Indirect interconnection networks
17368non hierarchical topologies
17381Two dimensional, e.g. mesh, torus
H04L 45/00
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
45Routing or path finding of packets in data switching networks
H04Q 2213/1305
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
QSELECTING
2213Indexing scheme relating to selecting arrangements in general and for multiplex systems
1305Software aspects
H04Q 2213/13093
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
QSELECTING
2213Indexing scheme relating to selecting arrangements in general and for multiplex systems
13093Personal computer, PC
H04Q 2213/13196
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
QSELECTING
2213Indexing scheme relating to selecting arrangements in general and for multiplex systems
13196Connection circuit/link/trunk/junction, bridge, router, gateway
H04Q 2213/13209
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
QSELECTING
2213Indexing scheme relating to selecting arrangements in general and for multiplex systems
13209ISDN
Applicants
  • SUPER PC INTERNATIONAL, LLC [US]/[US]
Inventors
  • LEVIN, Vladimir K.
  • JABLONKSY, Sergei V.
  • KORNEEV, Victor V.
  • MASSALOVITCH, Andrei I.
  • LACIS, Alexei O.
  • ZABRODIN, Alexei V.
  • KARATANOV, Vjacheslav V.
  • JALIN, Valerii V.
  • TITOV, Alexandr
  • AGEJEV, Vjacheslav M.
  • PATRIKEEV, Andrei
Agents
  • WOLDE-MICHAEL, Girma
Priority Data
60/001,07212.07.1995US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) DEADLOCK-FREE MESSAGE-PASSING SYSTEM FOR MIMD COMPUTER PROCESSING SYSTEMS UTILIZING A CSP PROGRAMMING MODEL
(FR) SYSTEME DE PASSAGE DE MESSAGES SANS INTERBLOCAGE, DESTINE A DES SYSTEMES DE TRAITEMENT INFORMATIQUES A INSTRUCTIONS MULTIPLES ET DONNEES MULTIPLES METTANT EN OEUVRE UN PROCEDE SEQUENTIEL DE COMMUNICATION
Abstract
(EN)
A message-passing system allows for deadlock-free message-passing and ability to support irregular connection topologies among nodes in the computer system. Messages are passed from node (74) to node utilizing buffers (82) at intermediate nodes to temporarily store the messages. The user code is divided into multiple concurrent user processes (64) which communicate with each other via channels (82-2). Each user process executing at a node is also provided with a corresponding, but separate, router process (80) which uses a set of N-1 virtual channels (84) to communicate with all other processes in the system, N being the number of processes. The router process (80) is provided with a routing table (86) implementing the minimum route length solution for interconnecting nodes in any arbitrary network topology. The router process (80) also allows for standard I/O functions to be emulated at every node in the system. The router process implements a buffer pool (120-1 and 120-2) management structure which is organized by channels (118) and hops.
(FR)
Ce système de passage de messages permet le passage de messages sans interblocage et l'accueil de topologies de connexion irrégulières dans des noeuds d'un système informatique. Les messages passent de noeud (74) à noeud par le biais de mémoires tampon (82) situées au niveau de noeuds intermédiaires et destinées à stocker temporairement ces messages. Le code utilisateur est divisé en plusieurs processus concurrents (64) utilisateur communiquant les uns avec les autres via des canaux (82-2). Chaque processus utilisateur, opérationnel au niveau d'un noeud, est également doté d'un processus de routage correspondant (80), mais séparé, qui utilise un ensemble de canaux virtuels N-1 (84) pour communiquer avec tous les autres processus du système, N représentant le nombre de processus. Le processus de routage (80) est doté d'une table de routage (86) mettant en oeuvre une solution de sous-graphe acyclique pour interconnecter des noeuds dans une quelconque topologie de réseau arbitraire. Le processus de routage (80) permet l'émulation des fonctions standard d'entrée/sortie au niveau de chaque noeud du système et il met en oeuvre une structure de gestion d'un groupe de mémoires tampon (120-1 et 120-2), organisée par canaux (118) et par sauts.
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