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1. WO1997039608 - BACKPLANE FOR HIGH SPEED DATA PROCESSING SYSTEM

Publication Number WO/1997/039608
Publication Date 23.10.1997
International Application No. PCT/US1997/006113
International Filing Date 11.04.1997
Chapter 2 Demand Filed 14.11.1997
IPC
H05K 1/02 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
H05K 1/14 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
14Structural association of two or more printed circuits
H05K 7/14 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
7Constructional details common to different types of electric apparatus
14Mounting supporting structure in casing or on frame or rack
CPC
H05K 1/0216
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
0213Electrical arrangements not otherwise provided for
0216Reduction of cross-talk, noise or electromagnetic interference
H05K 1/0248
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
0213Electrical arrangements not otherwise provided for
0237High frequency adaptations
0248Skew reduction or using delay lines
H05K 1/14
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
14Structural association of two or more printed circuits
H05K 2201/044
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
04Assemblies of printed circuits
044Details of backplane or midplane for mounting orthogonal PCBs
H05K 2201/09254
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
09Shape and layout
09209Shape and layout details of conductors
09218Conductive traces
09254Branched layout
H05K 2201/09263
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
09Shape and layout
09209Shape and layout details of conductors
09218Conductive traces
09263Meander
Applicants
  • ARIZONA DIGITAL, INC. [US]/[US]
Inventors
  • BERDING, Andrew, R.
Agents
  • WILLE, Paul, F.
Priority Data
08/632,64815.04.1996US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) BACKPLANE FOR HIGH SPEED DATA PROCESSING SYSTEM
(FR) FOND DE PANIER POUR SYSTEME INFORMATIQUE A VITESSE ELEVEE
Abstract
(EN)
A data processing system includes a backplane and a plurality of logic boards connected to the backplane by a plurality of connectors. In one embodiment of the invention, a set of common points (23, 24) is electrically coupled to the connectors by individual conductive traces between each common point (23) and the corresponding pins (31-36) of the connectors. The common points are preferably centrally located among the plurality of connectors to reduce propagation delay. A connector (75) can be attached at the common points. The traces are separated from each other by lateral displacement in a single plane. If the backplane is a multi-layered printed circuit board, the traces are separated from each other by vertical displacement between the layers of the printed circuit board or by both vertical and horizontal displacement. The traces to the connectors nearest the common points (83) have a minimum length (96) greater than the distance (92) between the nearest connectors and the common points.
(FR)
La présente invention a pour objet un système informatique composé d'un fond de panier et d'une pluralité de cartes logiques reliées au fond de panier par une pluralité de connecteurs. Dans un mode de réalisation de l'invention, un ensemble de points communs (23, 24) est couplé électriquement aux connecteurs par des lignes électroconductrices individuelles reliant chaque point commun (23) avec les broches correspondantes (31-36) des connecteurs. Les points communs sont de préférence centralisés parmi la pluralité de connecteurs afin de réduire le temps de propagation. Un connecteur (75) peut être fixé sur les points communs. Les lignes sont séparées les unes des autres par déplacement latéral sur un seul plan. Si le fond de panier est une carte de circuits imprimés multicouche, les lignes sont séparées les une des autres par déplacement vertical entre les couches de la carte de circuits imprimés ou par déplacement à la fois vertical et horizontal. Les lignes en direction des connecteurs les plus proches des points communs (83) ont une longueur minimale (96) supérieure à la distance (92) comprise entre les connecteurs les plus proches et les points communs.
Also published as
Latest bibliographic data on file with the International Bureau