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1. (WO1997019439) DIGITAL DRIVING OF MATRIX DISPLAY DRIVER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1997/019439 International Application No.: PCT/IB1996/001210
Publication Date: 29.05.1997 International Filing Date: 12.11.1996
IPC:
G09G 3/36 (2006.01)
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
G
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3
Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20
for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
34
by control of light from an independent source
36
using liquid crystals
Applicants:
PHILIPS ELECTRONICS N.V. [NL/NL]; Groenewoudseweg 1 NL-5621 BA Eindhoven, NL
PHILIPS NORDEN AB [SE/SE]; Kottbygatan 7 Kista S-164 85 Stockholm, SE (SE)
Inventors:
JANSSEN, Peter, J., M.; NL
Agent:
KOOIMAN, Josephus, J., A.; Internationaal Octrooibureau B.V. P.O. Box 220 NL-5600 AE Eindhoven, NL
Priority Data:
08/561,96122.11.1995US
Title (EN) DIGITAL DRIVING OF MATRIX DISPLAY DRIVER
(FR) COMMANDE NUMERIQUE D'UN CIRCUIT D'ATTAQUE D'AFFICHEUR MATRICIEL
Abstract:
(EN) A driver for a matrix display successively stores digital data codes. During a first time interval, the driver charges a capacitor coupled to its output to a voltage level represented by the most-significant bits of a stored data code. During a second time interval, the driver shifts the voltage on the capacitor by a magnitude represented by the least significant bits of the stored data code.
(FR) Cette invention concerne un circuit d'attaque destiné à un afficheur matriciel, lequel stocke séquentiellement des codes de données numériques. Au cours d'un premier intervalle, le circuit d'attaque charge un condensateur couplé à son entrée, jusqu'à un niveau de tension représenté par les bits les plus significatifs d'un code de données stocké. Au cours d'un second intervalle de temps, le circuit d'attaque décale la tension du condensateur d'une grandeur représentée par les bits les moins significatifs du code de données stocké.
Designated States: JP
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP0804784JPH10513281