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1. (WO1997016831) PROGRAM ALGORITHM FOR LOW VOLTAGE SINGLE POWER SUPPLY FLASH MEMORIES
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1997/016831 International Application No.: PCT/US1996/012045
Publication Date: 09.05.1997 International Filing Date: 19.07.1996
Chapter 2 Demand Filed: 01.04.1997
IPC:
G11C 16/10 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
10
Programming or data input circuits
Applicants:
ADVANCED MICRO DEVICES, INC. [US/US]; One AMD Place Mail Stop 68 Sunnyvale, CA 94088-3453, US
Inventors:
KUO, Tiao, Hua; US
CHANG, Chung, K.; US
CHEN, Johnny; US
YU, James, C., Y.; US
Agent:
PITRUZZELLA, Vincenzo, D.; Advanced Micro Devices, Inc. Mail Stop 68 One AMD Place Sunnyvale, CA 94088-3453, US
BROOKES & MARTIN; High Holborn House 52/54 High Holborn London WC1V 6SE, GB
Priority Data:
08/551,70501.11.1995US
Title (EN) PROGRAM ALGORITHM FOR LOW VOLTAGE SINGLE POWER SUPPLY FLASH MEMORIES
(FR) ALGORITHME DE PROGRAMMATION POUR MEMOIRES FLASH A ALIMENTATION EN PUISSANCE UNIQUE A FAIBLE TENSION
Abstract:
(EN) A programming algorithm for a flash memory wherein programming circuitry is subdivided into a set of separately controllable groups. The algorithm detects a number of logic zeros to be programmed into a flash cell array by each group and switches among the groups such that a number of simultaneously programmed cells in the flash cell array does not exceed a predetermined number and such that maximum available programming current is used to enhance programming speed.
(FR) Algorithme de programmation destiné à une mémoire flash dans laquelle le circuit de programmation est subdivisé en un ensemble de groupes pouvant être contrôlés de manière séparée. L'algorithme détecte un nombre de zéros logiques devant être programmés dans un réseau de cellules flash par chaque groupe et commute les groupes de sorte qu'un nombre de cellules simultanément programmées dans le réseau de cellules flash ne dépasse pas un nombre prédéterminé et que le courant de programmation disponible maximum serve à accroître la vitesse de programmation.
Designated States: JP, KR
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP0858661JP3947781 JPH11514775KR1019990064138