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Machine translation
1. (WO1997012389) DOUBLE-SPACER TECHNIQUE FOR FORMING A BIPOLAR TRANSISTOR WITH A VERY NARROW EMITTER
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1997/012389    International Application No.:    PCT/US1996/015298
Publication Date: 03.04.1997 International Filing Date: 25.09.1996
IPC:
H01L 21/331 (2006.01)
Applicants: ANALOG DEVICES, INCORPORATED [US/US]; One Technology Way, Norwood, MA 02062 (US)
Inventors: TSAI, Curtis; (US).
O, Kenneth, K.; (US).
SCHARF, Brad, W.; (US)
Agent: BOLLINGER, Howard, M.; Parmelee, Bollinger & Bramblett, 460 Summer Street, Stamford, CT 06901 (US)
Priority Data:
08/536,338 29.09.1995 US
Title (EN) DOUBLE-SPACER TECHNIQUE FOR FORMING A BIPOLAR TRANSISTOR WITH A VERY NARROW EMITTER
(FR) TECHNIQUE FAISANT APPEL A UN DOUBLE ESPACEUR PERMETTANT DE CREER UN TRANSISTOR BIPOLAIRE COMPORTANT UN EMETTEUR TRES ETROIT
Abstract: front page image
(EN)Emitter widths (W emit) of 0.3 $g(m)m on double polysilicon bipolar transistors are achieved using 0.8 $g(m)m photolithography and double spacer process. The emitter width (W emit) reduction is confirmed with structural and electrical measurements.
(FR)Selon l'invention, on obtient des largeurs d'émetteur (W emit) de 0,3 $g(m)m sur des transistors bipolaires en double polysilicium au moyen d'une photolithographie de 0,8 $g(m)m et d'un procédé fondé sur l'utilisation d'un double espaceur. Pour confirmer la diminution de la largeur de l'émetteur (W emit), on procède à des mesures de la structure et à des mesures électriques.
Designated States: JP.
European Patent Office (AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE).
Publication Language: English (EN)
Filing Language: English (EN)