WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO1997006601) MULTI-BIT SIGMA-DELTA DAC
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1997/006601    International Application No.:    PCT/US1995/010173
Publication Date: 20.02.1997 International Filing Date: 10.08.1995
Chapter 2 Demand Filed:    07.03.1997    
IPC:
H03M 1/80 (2006.01), H03M 3/04 (2006.01)
Applicants: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK [US/US]; 116th Street and Broadway, New York, NY 10027 (US) (For All Designated States Except US).
JU, Peicheng [US/US]; (US) (For US Only)
Inventors: JU, Peicheng; (US)
Agent: TANG, Henry; Brumbaugh, Graves, Donohue & Raymond, 30 Rockefeller Plaza, New York, NY 10112 (US)
Priority Data:
Title (EN) MULTI-BIT SIGMA-DELTA DAC
(FR) CONVERTISSEUR N/A MULTIBIT SIGMA-DELTA
Abstract: front page image
(EN)In multi-bit sigma-delta digital-to-analog (D/A) conversion, a highly linear switched-capacitor digital-to-analog converter (17) (DAC) in accordance with the invention is employed. The inventive DAC includes an array of holding capacitors (C12, C11, C21, C22) connected in parallel to an opamp (23) having a finite gain. A conversion period is divided into subintervals and each holding capacitor is associated with one of the subintervals. The inventive DAC also includes switches (S10, S20, S12, S22, S11, S21) for transferring a packet of charge to each holding capacitor during the subinterval associated with the holding capacitor.
(FR)Pour effectuer une conversion N/A multibit sigma-delta, on utilise un convertisseur N/A (17) hautement linéaire à commutation de capacité objet de l'invention. Ledit convertisseur comporte une série de condensateurs de maintien (C12, C11, C21, C22) reliées en parallèle à un amplificateur opérationnel (23) à gain fini. Une période de conversion se divise en sous-intervalles respectivement associés à chacun des condensateurs de maintien. Le convertisseur N/A (17) objet de l'invention comporte également des commutateurs (S10, S20, S12, S22, S11, S21) transférant un paquet de charge à chacun des condensateurs de maintien pendant le sous-intervalle associé au condensateur de maintien.
Designated States: CA, JP, US.
Publication Language: English (EN)
Filing Language: English (EN)