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1. WO1996041257 - MICROPROCESSOR USING INSTRUCTION FIELD TO SPECIFY EXPANDED FUNCTIONALITY

Publication Number WO/1996/041257
Publication Date 19.12.1996
International Application No. PCT/US1996/009986
International Filing Date 07.06.1996
Chapter 2 Demand Filed 07.01.1997
IPC
G06F 9/30 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
G06F 9/318 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
318with operation extension or modification
G06F 9/38 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
CPC
G06F 9/30101
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30098Register arrangements
30101Special purpose registers
G06F 9/3013
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30098Register arrangements
3012Organisation of register space, e.g. banked or distributed register file
3013according to data content, e.g. floating-point registers, address registers
G06F 9/30185
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30181Instruction operation extension or modification
30185according to one or more bits in the instruction, e.g. prefix, sub-opcode
G06F 9/34
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
34Addressing or accessing the instruction operand or the result ; ; Formation of operand address; Addressing modes
G06F 9/3844
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
3842Speculative instruction execution
3844using dynamic prediction, e.g. branch history table
Applicants
  • ADVANCED MICRO DEVICES, INC. [US]/[US]
Inventors
  • DUTTON, Drew, J.
  • CHRISTIE, David, S.
Agents
  • KIVLIN, B., Noel
  • WHRIGHT, Hugh, Ronald
Priority Data
08/474,40007.06.1995US
08/479,78207.06.1995US
08/481,70407.06.1995US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) MICROPROCESSOR USING INSTRUCTION FIELD TO SPECIFY EXPANDED FUNCTIONALITY
(FR) MICROPROCESSEUR UTILISANT UNE ZONE D'INSTRUCTION POUR SPECIFIER UNE FONCTIONNALITE ELARGIE
Abstract
(EN)
A microprocessor is provided which expands the functionality and/or performance of the implemented architecture in transparent and/or non-transparent ways. The microprocessor is configured to detect the presence of segment override prefixes in instruction code sequences being executed in flat memory mode and to use the prefix value to control internal and/or external functions. Additionally, the microprocessor may be configured to signal a change or modification of the normal execution of the instruction(s) which follow. Many embodiments are shown which use the segment override prefixes to expand the performance or capability of the microprocessor. Backward compatibility with older implementations of the x86 architecture may be maintained when implementing transparent embodiments.
(FR)
Microprocesseur élargissant la fonctionnalité et/ou la performance de l'architecture de façon transparente et/ou non transparente. Le microprocesseur est configuré pour détecter la présence de préfixes de remplacement de segment dans les séquences de codes d'instruction en cours d'exécution en mode mémoire linéaire et utiliser la valeur du préfixe pour commander les fonctions internes et/ou externes. De plus, le micro-processeur peut être configuré pour signaler un changement ou une modification de l'exécution normale des instructions qui suivent. De nombreux modes de réalisation sont décrits, dans lesquels les préfixes de remplacement d'instructions sont utilisés pour élargir la performance ou la capacité du microprocesseur. La compatibilité amont avec des versions plus anciennes de l'architecture x86 peut être maintenue lorsqu'on met en ÷uvre des procédés transparents.
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