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1. WO1996033495 - ON-CHIP CAPACITOR

Publication Number WO/1996/033495
Publication Date 24.10.1996
International Application No. PCT/EP1995/001457
International Filing Date 18.04.1995
IPC
G11C 5/00 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
5Details of stores covered by group G11C11/63
G11C 7/20 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
G11C 29/50 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation; Testing stores during standby or offline operation
04Detection or location of defective memory elements
50Marginal testing, e.g. race, voltage or current testing
CPC
G11C 11/401
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
G11C 2029/5006
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
5006Current
G11C 29/50
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
G11C 7/20
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
20Memory initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US] (AllExceptUS)
  • WENDEL, Dieter [DE]/[DE] (UsOnly)
  • KLINK, Erich [DE]/[DE] (UsOnly)
  • TORREITER, Otto [DE]/[DE] (UsOnly)
  • VAN DER HOEVEN, W. [US]/[US] (UsOnly)
Inventors
  • WENDEL, Dieter
  • KLINK, Erich
  • TORREITER, Otto
  • VAN DER HOEVEN, W.
Agents
  • RICHARDT, Markus
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) ON-CHIP CAPACITOR
(FR) CONDENSATEUR INCORPORE A UNE PUCE
Abstract
(EN)
The invention relates to the provision of an on-chip capacitor resulting in improved testability and reliability of the entire chip. The on-chip capacitor according to the invention is realized by a complementary cross-coupled structure which has a flip-flop characteristic. If a leakage current occurs in one of the transistors of the entire circuit structure this will cause the structure to switch into another state so that the leakage current is cut off. Thereby the on-chip capacitor is self-repairing as regards pinholes which develop over time.
(FR)
Condensateur incorporé à une puce, améliorant la capacité de se prêter aux essais ainsi que la fiabilité de toute la puce. Le condensateur intégré à la puce selon l'invention est réalisé au moyen d'une structure interconnectée complémentaire possédant une caractéristique de bascule. Si un courant de fuite se produit dans l'un des transistors de la structure de circuits, la structure bascule sur un autre état de façon à interrompre le courant de fuite. Ainsi, le condensateur incorporé à la puce répare lui-même les trous qui apparaissent avec le temps.
Also published as
Latest bibliographic data on file with the International Bureau