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1. WO1996006459 - COMPONENT STACKING IN MULTI-CHIP SEMICONDUCTOR PACKAGES

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]

IN THE CLAIMS:
1 . A multi-chip package comprising:
a substrate;
a film based component formed on the substrate;
a discrete component mounted on the substrate and stacked over the film based component such that the film based component is electrically insulated from the stacked discrete component and the discrete and film based components do not interfere with each others function;
a die component mounted on the substrate;
a plurality of leads suitable for electrically connecting the multi-chip packaged semiconductor arrangement to external circuitry, the leads being electrically coupled to associated ones of said components;
a plurality of wiring traces formed on the substrate, the wiring traces being arranged to electrically connect various ones of said components; and
a packaging material that encapsulates said components and the wiring traces and leaves a portion of the leads exposed to facilitate electrically connecting the multi-chip packaged semiconductor arrangement to external circuitry.

2. A multi-chip package as recited in claim 1 further comprising a passivazation layer formed over the film based component such that the passivazation layer electrically isolates the film based component from the discrete component.

3. A multi-chip package as recited in claim 1 wherein a gap electrically isolates the film based component from the discrete component.

4. A multi-chip package as recited in claim 1 further comprising:
a plurality of additional film based components formed on the substrate; and
a plurality of additional discrete components mounted on the substrate, the additional film based and discrete components being electrically coupled to associated ones of said components and leads.

5. A multi-chip package as recited in claim 4 further comprising a plurality of additional die components mounted on the substrate, the additional die components being electrically connected to associated ones of said components and leads.

6. A multi-chip package as recited in claim 1 wherein the film based component is selected from a group consisting of a capacitor, a resistor, and an inductor.

-9- SUBSTJTUTE SHEET (RULE 26)

7. A multi-chip package as recited in claim 1 wherein the discrete component is selected from a group consisting of a capacitor, a resistor, an inductor and a crystal.

8. A multi-chip package as recited in claim 1 wherein the leads are part of a lead frame.

9. A multi-chip package as recited in claim 1 further comprising landings for securing the discrete component to the substrate and electrically connecting the discrete component to associated traces or associated ones of said components.

10. A multi-chip package as recited in claim 4 wherein the film based components are thick film components formed by printing.

1 1. A multi-chip package as recited in claim 4 wherein the film based components are thin film components formed by deposition.

12. A multi-chip package comprising:
a substrate;
a plurality of film based components formed on the substrate, the film based components being selected from a group consisting of capacitors, resistors, and inductors; a passivazation layer formed over selected film based components that are intended for stacking;
a plurality of discrete components mounted on the substrate, wherein selected discrete components that are intended for stacking are stacked over associated film based components such that the passivazation layer electrically isolates the associated film based components from the selected discrete components, the discrete components being selected from a group consisting of capacitors, resistors, inductors and crystals;
a plurality of die components mounted on the substrate;
a plurality of leads suitable for electrically connecting the multi-chip packaged semiconductor arrangement to external circuitry, the leads being electrically coupled to associated ones of said components;
a plurality of wiring traces formed on the substrate, the wiring traces being arranged to electrically connect various associated ones of said components; and
a packaging material that encapsulates said components and the wiring traces and leaves a portion of the leads exposed to facilitate electrically connecting the multi-chip packaged semiconductor arrangement to external circuitry.

13. A method of creating a multi-chip package that includes a substrate, a die component, a film based component, a discrete component, leads for electrically connecting the multi-chip semiconductor arrangement to external circuitry and wiring traces for electrically connecting various associated components, the method comprising the steps of: forming wiring traces on a substrate;
forming a film based component on the substrate;
attaching a lead frame that includes a plurality of leads to the substrate;
mounting a die component and a discrete component to the substrate, wherein the discrete component is stacked over the film based component after application of the passivazation layer such that the discrete component is electrically insulated from the film based component; and
encapsulating the components, the wiring traces and a portion of the lead frame to form a packaged multi-chip semiconductor arrangement.

14. A method as recited in claim 13 wherein:
a plurality of film based components are formed on the substrate during said film based component forming step, the film based components being selected from the group consisting of resistors, capacitors and inductors; and
a plurality of discrete components are mounted on the substrate during said mounting step such that at least one of the discrete components is stacked over an associated film based component; the discrete components being selected from the group consisting of resistors, capacitors, inductors and crystals.

15. A method as recited in claim 14 wherein the film based components are thick film components formed by printing.

16. A method as recited in claim 14 wherein the film based components are thin film components formed by deposition.

17. A method as recited in claim 13 further comprising the step of applying a passivazation layer over the film based component such that the passivazation layer electrically isolates the film based component from the discrete component.