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1. WO1996005614 - FLIP CHIP BONDING WITH NON-CONDUCTIVE ADHESIVE

Publication Number WO/1996/005614
Publication Date 22.02.1996
International Application No. PCT/EP1995/001388
International Filing Date 13.04.1995
Chapter 2 Demand Filed 13.12.1995
IPC
H01L 21/56 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
H01L 23/485 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
482consisting of lead-in layers inseparably applied to the semiconductor body
485consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
CPC
H01L 21/563
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
H01L 2224/11
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
11Manufacturing methods
H01L 2224/1134
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
11Manufacturing methods
113by local deposition of the material of the bump connector
1133in solid form
1134Stud bumping, i.e. using a wire-bonding apparatus
H01L 2224/13
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
H01L 2224/13144
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
13099Material
131with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
13138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
13144Gold [Au] as principal constituent
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
Applicants
  • FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V. [DE/DE]; Leonrodstraße 54 D-80636 München, DE (AllExceptUS)
  • ASCHENBRENNER, Rolf [DE/DE]; DE (UsOnly)
  • GWIASDA, Jörg [DE/DE]; DE (UsOnly)
  • ZAKEL, Elke [DE/DE]; DE (UsOnly)
  • ELDRING, Joachim [DE/DE]; DE (UsOnly)
Inventors
  • ASCHENBRENNER, Rolf; DE
  • GWIASDA, Jörg; DE
  • ZAKEL, Elke; DE
  • ELDRING, Joachim; DE
Agents
  • LEONHARD, Reimund; Leonhard, Olgemöller, Fricke Josephspitalstrasse 7 D-80331 München, DE
Priority Data
94112626.012.08.1994EP
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) FLIP CHIP BONDING WITH NON-CONDUCTIVE ADHESIVE
(FR) SOUDAGE DES PUCES A BOSSES AVEC UN ADHESIF NON-CONDUCTEUR
Abstract
(EN)
Suggested is a flip chip technology using non-conductive adhesives (20) and gold ball bumps (10) or connectors. The concept is to simultaneously attach and interconnect bare chips with gold ball bumps to organic substrates (30). The chip is fixed by cooling the insulative adhesive. Environmental testing has demonstrated that performance characteristics were acceptable after 1000 hours of continuous exposure to humidity, and were excellent after 1000 temperature cycles. Such stable interconnections can only be realized by the compliance of the flip chip joint. This stability can be achieved by precise control of the bonding parameters such as temperature and pressure. This bonding technique allows quality attachment of bare chips on low cost organic substrates.
(FR)
L'invention concerne la technologie des puces à bosses utilisant des adhésifs non-conducteurs (20) ainsi que des bosses (10) ou connecteurs à boule d'or. Le concept consiste en la fixation et l'interconnexion simultanées de puces nues présentant des bosses à boule d'or à des substrats organiques (30). La puce est fixée par refroidissement de l'adhésif isolant. Des essais d'ambiance ont démontré que les caractéristiques de rendement sont acceptables après 1000 heures d'exposition continue à l'humidité, et restent excellentes après 1000 cycles de température. Ces interconnexions stables ne peuvent être réalisés que par élasticité de la connexion des puces à bosses. On peut obtenir cette stabilité par commande précise des paramètres de soudage telles que la température et la pression. Cette technique de soudage permet d'obtenir une fixation de qualité des puces nues sur des substrats organiques de faible coût.
Also published as
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