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1. WO1996005593 - A TUNED VITERBI DETECTOR AND EQUALIZER SYSTEM

Publication Number WO/1996/005593
Publication Date 22.02.1996
International Application No. PCT/US1995/010264
International Filing Date 10.08.1995
Chapter 2 Demand Filed 07.03.1996
IPC
G11B 5/09 2006.01
GPHYSICS
11INFORMATION STORAGE
BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
5Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
02Recording, reproducing or erasing methods; Read, write or erase circuits therefor
09Digital recording
G11B 20/10 2006.01
GPHYSICS
11INFORMATION STORAGE
BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
20Signal processing not specific to the method of recording or reproducing; Circuits therefor
10Digital recording or reproducing
H03M 13/41 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03-H03M13/35153
39Sequence estimation, i.e using statistical methods for the reconstruction of the original codes
41using the Viterbi algorithm or Viterbi processors
CPC
G11B 20/10009
GPHYSICS
11INFORMATION STORAGE
BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
20Signal processing not specific to the method of recording or reproducing; Circuits therefor
10Digital recording or reproducing
10009Improvement or modification of read or write signals
G11B 5/09
GPHYSICS
11INFORMATION STORAGE
BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
5Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
09Digital recording
H03M 13/41
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
41using the Viterbi algorithm or Viterbi processors
H03M 13/4107
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
41using the Viterbi algorithm or Viterbi processors
4107implementing add, compare, select [ACS] operations
H03M 13/6331
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
63Joint error correction and other techniques
6331Error control coding in combination with equalisation
H03M 13/6502
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
65Purpose and implementation aspects
6502Reduction of hardware complexity or efficient processing
Applicants
  • MAXTOR CORPORATION [US/US]; 211 River Oaks Parkway San Jose, CA 95134, US
Inventors
  • RIGGLE, C., M.; US
Agents
  • KULISH, Christopher, J. ; Sheridan Ross & McIntosh Suite 3500 1700 Lincoln Street Denver, CO 80203, US
Priority Data
288,47510.08.1994US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) A TUNED VITERBI DETECTOR AND EQUALIZER SYSTEM
(FR) DETECTEUR DE VITERBI ACCORDE ET SYSTEME EGALISEUR
Abstract
(EN)
A finite impulse response (FIR) filter (100) and a Viterbi detector system (110) for a magnetic read channel (101) are disclosed. The FIR equalizer generates equalized sampled outputs to the Viterbi detector system. The Viterbi detector system determines the most probable value of all references, Ri by accumulating a summation of data sample values, Dt, for selected legal bit sequences over a significant amount of random data. The summation and count of data samples are output to a system microprocessor for calculation of an average reference for each path of the Viterbi system. The Viterbi detector system also calculates, in real time, magnitude of differences between the output data received from the FIR equalizer and transition references for each data sample to generate transition metrics, adds transition metrics to state metrics from the source node of two paths, and compares the result. The lesser of the two yields the most likely correct state metric. Encoded bit strings of finite length are updated and saved for each state. Data is output from an arbitrary bit string.
(FR)
L'invention concerne un filtre (100) à réponse impulsionnelle finie (FIR) et un système détecteur de Viterbi (110) pour une voie de lecture magnétique (101). L'égaliseur FIR génère des sorties échantillonnées et égalisées et les envoie au système détecteur de Viterbi qui détermine la valeur la plus probable de toutes les références, Ri, en accumulant une sommation des valeurs des échantillons de données, DT, pour des séquences binaires autorisées sur une quantité importante de données aléatoires. La sommation et le comptage des données échantillons sont envoyés à un microprocesseur système qui calcule une référence moyenne pour chaque parcours du système de Viterbi. Le système détecteur de Viterbi calcule également, en temps réel, l'ampleur des différences entre les données de sortie reçues provenant de l'égaliseur FIR et les références de transition pour chaque échantillon de données pour générer des valeurs métriques de transition, il additionne ensuite les valeurs métriques de transition et des valeurs métriques d'état provenant du n÷ud source de deux parcours, puis il compare le résultat. Le plus faible des deux produit la valeur métrique correcte la plus probable. Des chaînes binaires codées de longueur finie sont mises à jour et sauvegardées pour chaque état. Des données sont produites à partir d'une chaîne binaire arbitraire.
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