Processing

Please wait...

Settings

Settings

1. WO1996002973 - VITERBI ACS UNIT WITH RENORMALIZATION

Publication Number WO/1996/002973
Publication Date 01.02.1996
International Application No. PCT/US1994/007957
International Filing Date 15.07.1994
Chapter 2 Demand Filed 04.01.1996
IPC
H03M 13/41 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03-H03M13/35153
39Sequence estimation, i.e using statistical methods for the reconstruction of the original codes
41using the Viterbi algorithm or Viterbi processors
CPC
H03M 13/4107
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
41using the Viterbi algorithm or Viterbi processors
4107implementing add, compare, select [ACS] operations
H03M 13/6502
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
65Purpose and implementation aspects
6502Reduction of hardware complexity or efficient processing
Applicants
  • STANFORD TELECOMMUNICATIONS, INC. [US/US]; 2421 Mission College Boulevard Santa Clara, CA 95056, US
Inventors
  • GRAHAM, Hatch; US
  • NGUYEN, Christine; US
Agents
  • WOODWARD, Henry, K. ; Townsend and Townsend Khourie and Crew One Market Plaza, 20th floor Steuart St. Tower San Francisco, CA 94105, US
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) VITERBI ACS UNIT WITH RENORMALIZATION
(FR) UNITE ACS VITERBI POSSEDANT UN CIRCUIT DE RENORMALISATION
Abstract
(EN)
In a Viterbi decoder including an add-compare-select (ACS) processor (ACS0, ACS1,... ACS63), speed is enhanced without loss of performance by maintaining a dynamic cumulative metric range for computed metrics to obtain two computed metrics, and the smaller of the two computed metrics is stored along with previously computed state metrics. In the renormalization circuit (RENORM), the stored state metrics are compared with a selected scale factor, for example one-half maximum scale factor, and all current state metrics are rescaled when the minimum stored metric value exceeds the selected scale factor.
(FR)
Décodeur Viterbi comprenant un organe de traitement (ACS0, ACS1, ...ACS63) à fonction ACS (ajouter-comparer-choisir), dont on augmente la vitesse sans perte de ses performances en maintenant une plage de mesures cumulatives dynamiques pour les mesures calculées afin d'obtenir deux mesures calculées dont la plus petite est mémorisée avec les mesures d'états logiques précédemment calculées. Dans le circuit de renormalisation (RENORM), les mesures d'états logiques mémorisées sont comparées avec un facteur d'échelle choisi, par exemple un demi facteur d'échelle maximum, et toutes les mesures d'états logiques en vigueur sont remises à l'échelle lorsque la valeur des mesures mémorisées dépasse le facteur d'échelle choisi.
Latest bibliographic data on file with the International Bureau