WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO1994015364) DEPLETABLE SEMICONDUCTOR ON INSULATOR LOW THRESHOLD COMPLEMENTARY TRANSISTORS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1994/015364    International Application No.:    PCT/US1993/012641
Publication Date: 07.07.1994 International Filing Date: 29.12.1993
Chapter 2 Demand Filed:    27.07.1994    
IPC:
H01L 27/12 (2006.01)
Applicants: HONEYWELL INC. [US/US]; Honeywell Plaza, Minneapolis, MN 55408 (US)
Inventors: LIU, Michael, S.; (US).
LAI, James, C.; (US)
Agent: BRUNS, Gregory, A.; Honeywell Inc., Honeywell Plaza - MN12-8251, Minneapolis, MN 55408 (US)
Priority Data:
07/997,864 29.12.1992 US
Title (EN) DEPLETABLE SEMICONDUCTOR ON INSULATOR LOW THRESHOLD COMPLEMENTARY TRANSISTORS
(FR) SEMICONDUCTEUR A DEPLETION MENAGE SUR DES TRANSISTORS COMPLEMENTAIRES DE SEUIL INFERIEUR FORMES SUR UN ISOLATEUR
Abstract: front page image
(EN)A pair of complementary MOSFET's having regions of a common conductivity types separating the source and drain regions thereof.
(FR)L'invention se rapporte à une paire de transistors à effet de champ MOS comportant des régions d'un type de conductivité commun, séparant les régions source et drain de ceux-ci.
Designated States: JP.
European Patent Office (AT, BE, CH, DE, DK, ES, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE).
Publication Language: English (EN)
Filing Language: English (EN)