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1. WO1993003502 - METHOD OF PRODUCING VERTICAL MOSFET

Publication Number WO/1993/003502
Publication Date 18.02.1993
International Application No. PCT/JP1992/000929
International Filing Date 22.07.1992
IPC
H01L 21/28 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H01L 21/336 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
H01L 29/04 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
04characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 29/06 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/423 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
H01L 29/78 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
CPC
H01L 21/28167
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
28008Making conductor-insulator-semiconductor electrodes
28017the insulator being formed after the semiconductor body, the semiconductor being silicon
28158Making the insulator
28167on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
H01L 21/28211
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
28008Making conductor-insulator-semiconductor electrodes
28017the insulator being formed after the semiconductor body, the semiconductor being silicon
28158Making the insulator
28167on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
28211in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
H01L 29/045
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
04characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
045by their particular orientation of crystalline planes
H01L 29/0696
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0684characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
0692Surface layout
0696of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
H01L 29/4236
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
42356Disposition, e.g. buried gate electrode
4236within a trench, e.g. trench gate electrode, groove gate electrode
H01L 29/7813
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
7802Vertical DMOS transistors, i.e. VDMOS transistors
7813with trench gate electrode, e.g. UMOS transistors
Applicants
  • NIPPONDENSO CO., LTD. [JP]/[JP] (AllExceptUS)
  • TOKURA, Norihito [JP]/[JP] (UsOnly)
  • TAKAHASHI, Shigeki [JP]/[JP] (UsOnly)
Inventors
  • TOKURA, Norihito
  • TAKAHASHI, Shigeki
Agents
  • USUI, Hirohiko
Priority Data
3/18760226.07.1991JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD OF PRODUCING VERTICAL MOSFET
(FR) PROCEDE DE FABRICATION DE TRANSISTORS A EFFET DE CHAMP MOS DE TYPE VERTICAL
Abstract
(EN) A vertical power MOSFET which has a markedly decreased on-resistance per unit area. A groove having a gate structure is substantially formed by the LOCOS method prior to forming the p-type base layer and the n+-type source layer. Then, the p-type base layer (16) and the n+-type source layer (4) are formed by double diffusion being self-aligned with the LOCOS oxide film (65) and, at the same time, a channel (5) is set in the sidewall (51) of the LOCOS oxide film. Then, the LOCOS oxide film is removed to form a U-groove thereby to constitute the gate structure. That is, the channel is set by double diffusion which is self-aligned to the LOCOS oxide film, i.e., the channels are correctly set symmetrically in the sidewalls on both sides of the groove. Therefore, the position of the U-groove is not deviated with respect to the end of the base layer, and the length of the bottom surface of the U-groove can be minimized. This makes it possible to greatly decrease the size of the unit cell and to greatly decrease the on-resistance per unit area.
(FR) L'invention se rapporte à un transistor à effet de champ MOS à courant vertical, dont la résistance à l'état actionné par unité de superficie est considérablement réduite. A cet effet, une rainure possédant une structure de porte est essentiellement formée par le procédé LOCOS avant la formation de la couche de base type p et de la couche source type n+. Puis, la couche de base type p (16) et la couche source type n+ (4) sont formées par double diffusion avec auto-alignement sur le film d'oxyde LOCOS (65) et, en même temps, un canal (5) est établi dans la paroi latérale (51) du film d'oxyde LOCOS, lequel est ensuite éliminé pour former une rainure en U, afin de constituer la structure de porte. Ainsi, le canal est établi par diffusion double avec auto-alignement sur le film d'oxyde LOCOS, c'est-à-dire que les canaux sont établis avec précision de façon symétrique dans les parois latérales des deux côtés de la rainure. De cette façon, la position de la rainure en U ne se trouve pas décalée par rapport à l'extrémité de la couche de base et la longueur de la surface de fond de la rainure en U peut être réduite au minimum, ce qui permet d'augmenter considérablement la taille de la cellule unitaire et de réduire considérablement la résistance à l'état actionné par unité de superficie.
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