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1. WO1992016946 - SEMICONDUCTOR MEMORY HAVING NONVOLATILE SEMICONDUCTOR MEMORY CELL

Publication Number WO/1992/016946
Publication Date 01.10.1992
International Application No. PCT/JP1992/000323
International Filing Date 18.03.1992
IPC
G11C 7/12 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
G11C 16/04 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
G11C 16/10 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
G11C 16/26 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
26Sensing or reading circuits; Data output circuits
G11C 29/00 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation; Testing stores during standby or offline operation
CPC
G11C 16/0441
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
0408comprising cells containing floating gate transistors
0441comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
G11C 16/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
G11C 16/26
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
26Sensing or reading circuits; Data output circuits
G11C 29/82
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
70Masking faults in memories by using spares or by reconfiguring
78using programmable devices
80with improved layout
816for an application-specific layout
82for EEPROMs
G11C 7/12
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
Applicants
  • FUJITSU LIMITED [JP]/[JP] (AllExceptUS)
  • YAMAZAKI, Hirokazu [JP]/[JP] (UsOnly)
Inventors
  • YAMAZAKI, Hirokazu
Agents
  • ITOH, Tadahiko
Priority Data
3/5504219.03.1991JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR MEMORY HAVING NONVOLATILE SEMICONDUCTOR MEMORY CELL
(FR) MEMOIRE A SEMI-CONDUCTEUR DOTEE D'UNE CELLULE DE MEMOIRE REMANENTE A SEMI-CONDUCTEUR
Abstract
(EN) A semiconductor memory having a nonvolatile semiconductor memory cell for writing data, wherein electrons escape from the semiconductor memory (1) and a load transistor (8) at the same time and each threshold voltage difference is kept constant by providing the load transistor (8) of the nonvolatile semiconductor memory cell (1) with a floating gate (27) similary to the nonvolatile semiconductor memory cell (1) in order to read initially stored data from the semiconductor memory cell (1).
(FR) Mémoire à semi-conducteur comportant une cellule de mémoire rémanente à semi-conducteur utilisée pour écrire des données, de sorte que des électrons s'échappent de la mémoire à semi-conducteur (1) et d'un transistor de charges (8) simultanément, chaque différence de tension de seuil est maintenue constante par le fait que l'on a doté le transistor de charge (8) de la cellule de mémoire rémanente à semi-conducteur (1) d'un grille flottante (27) similaire à la cellule de mémoire rémanente à semi-conducteur (1) afin d'extraire des données initialement stockées de la cellule de mémoire à semi-conducteur (1).
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