Processing

Please wait...

Settings

Settings

Goto Application

1. WO1992016892 - FLOATING-POINT DIVIDING CIRCUIT

Publication Number WO/1992/016892
Publication Date 01.10.1992
International Application No. PCT/JP1992/000296
International Filing Date 12.03.1992
IPC
G06F 7/52 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
7Methods or arrangements for processing data by operating upon the order or content of the data handled
38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
48using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
52Multiplying; Dividing
CPC
G06F 7/4873
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
7Methods or arrangements for processing data by operating upon the order or content of the data handled
38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
48using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system, floating-point numbers
487Multiplying; Dividing
4873Dividing
G06F 7/535
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
7Methods or arrangements for processing data by operating upon the order or content of the data handled
38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
48using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
52Multiplying; Dividing
535Dividing only
G06F 7/5375
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
7Methods or arrangements for processing data by operating upon the order or content of the data handled
38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
48using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
52Multiplying; Dividing
535Dividing only
537Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
5375Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT;
Applicants
  • FUJITSU LIMITED [JP]/[JP] (AllExceptUS)
  • KUROIWA, Koichi [JP]/[JP] (UsOnly)
Inventors
  • KUROIWA, Koichi
Agents
  • ITOH, Tadahiko
Priority Data
3/4845213.03.1991JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) FLOATING-POINT DIVIDING CIRCUIT
(FR) CIRCUIT DE DIVISION EN VIRGULE FLOTTANTE
Abstract
(EN)
A floating-point dividing circuit for dividing floating-point data by a nonrecovery dividing method. The circuit has a circuit part (83) which pre-processes a dividend (N) and a divisor (D) before dividing and determines a division type, an exponent operating part (91), a mantissa dividing part (100), a quotient generating circuit part (93, 94, 101, 103-105), and at least one of an exception and non-operation detecting part (92) and a control part (90). The exception and non-operation detecting part (92) generates a stop signal (DSTOP#X) upon detecting a non-operation pattern, and stops the repeated operation of the mantissa dividing part (100). The control part (90) generates at least one of a non-execution signal (DRUN) and a control signal (DCNT0-15#X), and stops latch operations of registers, during the non-execution of a division instruction.
(FR)
Circuit de division en virgule flottante servant à la division de données en virgule flottante par un procédé de division sans récupération. Le circuit possède une partie (83) qui exécute le pré-traitement d'un dividende (N) et d'un diviseur (D) avant de procéder à la division et qui détermine un type de division, une partie (91) d'éxécution exponentielle, une partie (100) de division de mantisse, une partie (93, 94, 101, 103-105) de génération du quotient, et au moins une partie (92) de détection d'exception et de non-opération, ainsi qu'une partie (90) de commande. La partie (92) de détection d'exception et de non opération génère un signal stop d'arrêt (DSTOP#X) s'il détecte une configuration de non-opération, et il arrête l'opération répétée de la partie (100) de division de mantisse. La partie de commande génère au moins un signal de non exécution (DRUN) et un signal de commande (DCNT0-15#X) et il arrête des opérations de verrouillage des registres pendant la non-exécution d'une instruction de division.
Latest bibliographic data on file with the International Bureau