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1. WO1992016091 - A PACKAGE FOR INTEGRATED CIRCUITS

Publication Number WO/1992/016091
Publication Date 17.09.1992
International Application No. PCT/SE1992/000118
International Filing Date 26.02.1992
Chapter 2 Demand Filed 19.06.1992
IPC
H01L 21/50 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
H01L 23/057 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape
053the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
057the leads being parallel to the base
H01L 23/48 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
CPC
H01L 21/50
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
H01L 23/057
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape ; of the container or parts, e.g. caps, walls
053the container being a hollow construction and having an insulating ; or insulated; base as a mounting for the semiconductor body
057the leads being parallel to the base
H01L 24/72
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
24Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
71Means for bonding not being attached to, or not being formed on, the surface to be connected
72Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
H01L 2924/01005
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
01Chemical elements
01005Boron [B]
H01L 2924/01006
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
01Chemical elements
01006Carbon [C]
H01L 2924/01013
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
01Chemical elements
01013Aluminum [Al]
Applicants
  • CARLSTEDT ELEKTRONIK AB [SE]/[SE] (AllExceptUS)
  • CARLSTEDT, Lars, Gunnar [SE]/[SE] (UsOnly)
Inventors
  • CARLSTEDT, Lars, Gunnar
Agents
  • BERG, Sven, Anders
Priority Data
9100597-501.03.1991SE
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) A PACKAGE FOR INTEGRATED CIRCUITS
(FR) BOITIER DE CIRCUIT INTEGRE
Abstract
(EN)
The invention relates to a package for VLSI-chips. A substrate means (A1; B1; C1), a frame means (3; 14) and a lid means (A5; B5; C5) makes a housing having an inside cavity. First connection means (4; 16) are provided on the inside of said cavity in electrical contact with external contact means (6; 22) on the outside of the housing. A chip (A3; B3; C3) having second connection means (8; B19) is placed inside the cavity. At least one interconnection film (A2; B2; C2) is placed adjacent the chip (A3; B3; C3) and has third and fourth connection means (9, 5; 21, 20). The third connection means (9; 21) are positioned to make contact with the second connection means (8; B19) on the chip. The fourth connection means (5; 20) are positioned to make contact with the first connection means (4; 16) inside the cavity. Individual ohmic contacts are provided individually between chosen among the third and fourth connection means (9, 5; 21, 20) for making connection between chosen of the first and second connection means (4, 8; 16, 22).
(FR)
L'invention se rapporte à un boîtier de circuits intégrés VLSI (intégration à très grande échelle). Un moyen formant un substrat (A1, B1, C1), un moyen formant un bâti (3, 14) et un moyen formant un couvercle (A5, B5, C5) constituent un boîtier comportant une cavité intérieure. Des premiers moyens de branchement (4, 16) se trouvent à l'intérieur de ladite cavité en contact électrique avec des moyens de contact extérieurs (6, 22) situés à l'extérieur du boîtier. Un circuit intégré (A3, B3, C3) pourvu de deuxièmes moyens de branchement (8, B19) est placé à l'intérieur de la cavité. Au moins une pellicule de liaison (A2, B2, C2) est placée en position contiguë au circuit intégré (A3, B3, C3) et possède des troisièmes et quatrièmes moyens de branchement (9, 5; 21, 20). Les troisièmes moyens de branchement (9, 21) sont placés de façon à être en contact avec les deuxièmes moyens de branchement (8, B19) du circuit intégré. Les quatrièmes moyens de branchement (5, 20) sont placés de façon à être en contact avec les premiers moyens de branchement (4, 16) situés à l'intérieur de la cavité. Des contacts ohmiques individuels sont situés individuellement entre des moyens sélectionnés parmi les troisièmes et quatrièmes moyens de branchement (9, 5; 21, 20), afin d'effectuer une liaison entre des moyens sélectionnés parmi les premiers et deuxièmes moyens de branchement (4, 8; 16, 22).
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