Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO1992011628) MINIATURE HARD DISK DRIVE FOR PORTABLE COMPUTER
Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

Specification

MINIATURE HARD DISK DRIVE FOR PORTABLE COMPUTER

c

10

BACKGROUND OF THE INVENTION
Field of the Invention
This invention relates to the storage of digital
information, and more particularly to a miniature disk
15 drive and associated circuitry for storage of digital
information on a rotating disk.

Description of Prior Art
As computerized devices have been reduced in size
over the years, the demand for smaller disk drives has
20 correspondingly increased to keep pace with the reduced
sized computing devices. One hard disk drive in the prior art, which includes a 3.5" rigid disk, is described in
U.S. Patent 4,568,988 issued February 4, 1986 to McGinlay et al. This patent was reexamined, resulting in the
25 issuance of Reexamination Certificate Bl 4,568,988, issued November 29, 1988. McGinlay et al. describe a 3.5"
Winchester disk drive which utilizes a disk having a
diameter in the range of 85-100 mm. in diameter, with a
recording density of 600 tracks per inch, utilizes open
30 loop servo positioning system and reports a storage
capacity in excess of 5 megabytes per disk when formatted.
McGinlay et ai. also disclose the use of a rotary actuator which is driven by a stepper motor through a band.
A further reduction in size of computer equipment
35 lead to the development of a 2.5" form factor rigid disk drive. An example of such a disk drive is illustrated in U.S. Patent 4,933,785 issued June 12, 1990 to Morehouse et al. The rigid disk drive disclosed in Morehouse et al. used two rigid disks, each having a diameter of about 2.5" and utilized a rotary actuator for positioning magnetic recording heads above the tracks of the disks. The
"footprint" (width by length measurement) of the drive described in the above-noted Morehouse et al. patent was described as being 2.8" x 4.3". That is, the housing used to enclose the rigid disk drive was 2.8" wide and 4.3" long. A rigid disk drive of this size is generally applicable to computers having a size of 8.5" x 11" x 1". As computers become smaller, such as, for example, a "palm top", "hand held" or "pocket" size, it is necessary to provide a rigid disk drive which is smaller than either of the foregoing described drives.

SUMMARY OF THE INVENTION
An object of the present invention is to provide a rigid disk drive having a "footprint" and height suitable for "palm top", "hand held" or "pocket" sized computers.
Another object of the present invention is to provide a rigid disk drive having an increased areal recording density.
In accordance with the invention, a disk drive information storage device is provided which comprises a rigid disk having a diameter in the range from about 45 mm. to 50 mm. , a housing for the disk drive information storage device having a width of about 51 mm. , the disk storage device utilizing a spin motor supported on the housing for rotating a rigid disk, and a rotary actuator for positioning read/write transducer elements over the surface of the disk for the record and play back of
digital information. In accordance with another feature of the invention, a disk storage device as described above is provided in which the length of the housing is about 70mm.

In accordance with another feature of the invention, the transducer support arm of the disk storage device includes a lift tab which cooperates with a cam assembly supported on the disk drive housing to provide for dynamic loading and unloading of the transducer above the surface of the disk.
In accordance with a further feature of the
invention, the disk drive of the present invention
includes embedded servo fields in each track, these fields being of different lengths, which permit the storage of increased amount of additional information in each track.

In accordance with yet another feature of the present invention, a jacket fabricated from a resilient, shock absorbent material such as foam rubber, is provided for supporting the disk storage device in a housing.
In accordance with yet another feature of the present invention, the rigid disk storage device includes an inertial latch in operative relationship with the rotatory actuator to prevent the actuator from being rotated as the result of the disk drive being subjected to rotational forces.
In. accordance with yet another feature of the present invention, the disk drive apparatus is provided with a spin motor which includes a stator having a plurality of windings associated therewith and a rotor having a
plurality of magnetic poles. Each winding is made up of first and second portions, with only one portion of each winding being used during normal running of the motor, but both winding portions being used during power down of the spin motor to generate back electromagnetic force to unload the heads from the disk when the drive is powered down.
In accordance with yet another feature of the
invention, the rigid disk drive of the present invention is provided with a spin motor control system which
includes a back electromotive force commutation circuit which uses digital techniques to generate commutation pulses, a start up circuit also employing digital
techniques to initially generate commutation pulses for starting the spin motor, and a monitor circuit for
determining the motor spin direction and making correction of direction if necessary, as well as providing blanking of back EMF signals directly after a commutation occurs.
In accordance with yet another feature of the present invention, the height of the head disk assembly utilized in the rigid disk drive is reduced by utilizing a single magnet along with a flux plate to focus the flux field across the actuator coil.

BRIEF DESCRIPTION OF THE DRAWINGS
Other objects and advantages of the invention will become apparent from the study of the specification and drawings in which:
Figure 1 is a top plan view of the rigid disk drive and its associated printed circuit board which includes drive and controller electronics;
Figure 2 is a view of the disk drive and printed circuit board of Figure 1 taken along lines 2-2 of Figure i;
Figure 3 is a side view of the head disk assembly taken along the lines 3-3 of Figure 1;
Figure 4 is a top plan view of the head disk assembly and the drive controller electronics board with the drive and controller electronics board positioned beneath the head disk assembly;
Figure 5 is a view of the head disk assembly and the controller electronics taken along the lines 5-5 of Figure 4;
Figure 6 is a top plan view, highly enlarged, of the head disk assembly with the cover of the head disk
assembly removed and with the heads unloaded;
Figure 7 is a top plan view of the head disk assembly with the cover removed and with the head arm positioned for reading or writing information to the disk;

Figure 8 is a highly enlarged cross-sectional view of the head disk assembly taken along the lines 8-8 of Figure i;
Figure 9 is a top plan view of the rotary actuator used in the head disk assembly;
Figure 10 is a perspective view of one of the sliders and support arms used in the head disk assembly;
Figure 11 is a perspective view of the underside of the slider and support arm illustrated in Figure 10;
Figure 12 is a combined electrical block diagram and partial structural diagram of the head disk assembly;
Figure 13 is a block diagram of the spin control circuitry utilized to control the spin motor;
Figure 14 is a block diagram of the read/write combo circuitry;
Figure 15 is a block diagram of the actuator driver and power off unload circuitry;
Figure 16 is a block diagram of the actuator A/D & D/A circuitry;
Figure 17 is a block diagram of the disk controller circuitry;
Figure 18 is a block diagram of the gate array circuitry;
Figure 19 is a schematic circuit of the memory mapped register portion of the clock logic circuit utilized in the gate array;
Figure 20a is an illustration of a typical sector utilized on the magnetic recording disk of the head disk assembly;
Figure 20b is a timing diagram of the window signals produced by the programmable low power timer circuit of the gate array; and
Figure 20c is a timing diagram of the window signals produced by the digital demodulator & Gray address
separator of the and gate array.

DETAILED DESCRIPTION OF THE INVENTION Referring to Figure 1, head disk assembly 1 is illustrated in top plan view along with its associated drive and controller electronics board 2. Interconnection between head disk assembly 1 and drive and controller electronics board 2 is provided by flexible cable 3. By providing the drive and controller electronics on a separate board, it is possible to significantly reduce the "footprint" as well as the volume of the disk drive. Head disk assembly 1 has a width of approximately 50.8 mm., a length of 70 mm. and a thickness of approximately 10 mm. Utilizing a housing of the foregoing dimensions along with a rigid disk having a diameter of approximately 48 mm. and recording on both sides of the disk, provides a storage capacity from 11.5 megabytes to 23.0 megabytes (both quoted as a formatted disk) . This compact size along with the substantial recording capacity lends the head disk assembly with its associated drive and controller
electronics uniquely applicable to "palm top" or "pocket" computer applications. Alternative sized disks, in the range of from 45mm to 50mm in diameter, with, of course modified sized components to accommodate these disks, also are included in the present invention.
The high storage capacity is achieved by, among other things, utilizing a unique servo field in an embedded servo system, which is described and claimed in copending and commonly assigned U.S. Patent Application Serial No. 07/M-1470 of J. Blagaila et al. filed on December XX, 1990 and entitled: "Servo Field Scheme for High Sampling Rate and Reduced Overhead Embedded Servo Systems In Disk
Drives" which is incorporated herein by reference in its entirety. In addition to the high storage capacity, the disk drive and controller require very low power for operation, which is achieved by, among other things, using a spin motor having windings on the stator which are made up of two portions. Only one of the winding portions is used when the spin motor is being powered to drive the disk, however when the drive is powered down the two portions are connected in series and the back EMF
generated drives actuator coil 40 to unload the heads from the disk. The spin motor is described and claimed in co- pending and commonly assigned U.S. Patent Application Serial No. 07/M-1492 of J. Morehouse et al. filed December XX, 1990, entitled: "Spin Motor for a Hard Disk Assembly", which is incorporated herein by reference in its entirety; the utilization of a spin motor control system, which is described in co-pending and commonly assigned U.S. Patent Application Serial No. 07/M-1493 of M. Utenick et al., filed December XX, 1990 and entitled: "Spin Motor Control System for a Hard Disk Assembly", which is incorporated herein by reference in its entirety; as well as the utilization of dynamic head loading so that the heads are unloaded from the surface of the disk to reduce the amount of start up power required (as opposed to take off and landing of a head slider on the surface of the disk) this feature being described and claimed in co-pending and commonly assigned U.S. Patent Application Serial No. 07/M-1488 of J. Morehouse et al. filed December XX, 1990, and entitled: "Rigid Disk Drive With Dynamic Head Loading Apparatus" which is incorporated herein by reference in its entirety. The above-noted power saving features are required by smaller sized computers since the batteries used in such computers are also of smaller size and capacity.
Returning to Figure 1, drive and controller
electronics board 2 has the dimensions of approximately 58 mm. in width, 70 mm. in length and 7 mm. in thickness.
The head disk assembly and drive and controller
electronics board may be mounted in a personal computer in the orientation illustrated in Figures 1 and 2, or if the generally planar orientation is less desirable, a stacked orientation as illustrated in Figures 4 and 5 may bε utilized. Figure 5 illustrates a view of head disk assembly 1 and drive and controller electronics board 2 in the stacked orientation as viewed along the lines 5-5 of Figure 4. In this orientation, the overall thickness (or height as viewed in Figure 5, for example, is
approximately 15 mm. Electrical connections for the signals going to and coming from the host device are provided utilizing interface connector 4 which is
illustrated in Figures 1, 2, 4 and 5.
In Figure 1, the portion of interface connector 4 which is illustrated is the backside of the connector. Turning to Figure 2, which is a view taken along the lines 2-2 of Figure 1, it will be noted that pins 5 of connector 4 extend from the side of circuit board 6 which is
opposite to the side of circuit board 6 which includes the integrated circuits which are identified by their function in Figure 1. The details of the circuits utilized in disk drive and control electronics board 2 will be described hereinafter. As illustrated in Figure 2, as well as other figures, head disk assembly 1 is enclosed in a housing which includes cover 7 and baseplate 8. A detailed description of cover 7, baseplate 8 and the internal components of head disk assembly 1 will be described hereinafter in detail.
Turning to Figure 3, a side view, taken along lines 3-3 of Figure 1, of head disk assembly 1 is illustrated. As will be appreciated by reference to Figure 3, cover 7 and baseplate 8 have a reduced thickness in the right hand portions thereof (viewed in Figure 3) . The detail of the structure of cover 7 and baseplate 8 in this area will be better appreciated by the discussion hereinafter and the reference to Figure 8 which is a cross-section of head disk assembly 1 taken along the lines 8-8 in Figure 1. To supply additional stability to head disk assembly 1 in view of the reduced thickness of baseplate 8 along the front edge, a standoff 9, as illustrated in Figures 2, 3 and 5, is provided.
As indicated above, the disk drive according to the present invention is capable of in one version storing 11.5 megabytes of data utilizing a single disk, and in another version, also utilizing a single disk, storing up to 23.0 megabytes of information. In the following chart, the major parameters utilized in each of these versions of the drive to achieve the foregoing capacities are set forth.
VERSION I VERSION II

CAPACITY FORMATTED Per Drive (Megabytes) 11. 23.0
Per Track (Bytes) 11,776 23,552
Per Sector (Bytes) 512 512
Sectors Per Track (ID) 23 23
(CO) 23 46
FUNCTIONAL 46,400
34,800
86
1
2
610
1 ,857
1.7
PERFORMANCE 1.84
4.0
3,490
8.6
29
8
40
1.5
32

AT/XT

POWER

A highly enlarged top plan view of the head disk assembly 1, with cover 7 removed, is illustrated in Figure 6. Turning to Figure 6, head disk assembly 1 utilizes a single rigid disk 16 having its generally planar surfaces coated with a suitable magnetizable coating for the recording and playback of digital information. Rigid disk 16 has an outside diameter of approximately 48 millimeters and an inside diameter of approximately 12 millimeters. Rigid disk 16 may be, for example, comprised of an
aluminum platter having a suitable magnetic coating applied to the upper and lower planar surfaces, which coating may be for example a cobalt alloy. To better appreciate the explanation of the structural
characteristics of head disk assembly 1, concurrent reference with Figure 6 and Figure 8 (which is a cross- sectional view of head disk assembly 1 taken along the lines 8-8 in Figure 1) will be helpful. Rigid disk 16 is supported for rotation in baseplate 8 by a brushless DC spin motor. A detailed description of this brushless DC spin motor is included in copending above-described U.S. Patent Application Serial No. 07/M-1492. Portions of this motor will also be described herein for the purposes of illustration with regard to the head disk assembly.
Referring to Figures 6 and 8, the brushless DC motor includes a stator portion having nine lamination portions 17, each of which has windings 18. The stator portion is supported on baseplate 8. Rotor 19 is rigidly affixed to shaft 20 which is supported in baseplate 8 utilizing a bearing assembly, the bearings of which are indicated at 21. Permanent magnet ring 22 is supported in operative relationship to the plurality of lamination portion 17 and windings 18, permanent magnet ring being supported on lower portion 23 of rotor 19. Rigid disk 16 is supported on rotor 19 for rotation therewith by clamp ring 24 which is pressfit onto rotor 19. The details of the start-up 5 commutation as well as direction detection for the spin motor fully described in the above referenced U.S. Patent Application Serial No. 07/M-1493.
Smaller computers of the portable variety have a limited power capacity since it is desirable to have a

10 small battery pack for such devices. In order to reduce the power requirements of head disk assembly 1, the power required for motor start-up is reduced by utilizing dynamic head loading to eliminate stiction between the recording head slider and the disk. Dynamic head loading

15 permits unlimited start-stop capability which results in power reduction by allowing power down immediately after utilization. Referring to Figure 6, the head disk
assembly 1 is illustrated with the read-write recording head and its associated slider in the at rest position

20 where the slider is supported outside the periphery of rigid disk 16. The detail structure for accomplishing dynamic head loading and unloading for a disk drive according to the present invention is described in detail in the above-referenced U.S. Patent Application Serial No.

25 07/M-1488. Briefly, load beam 28 of head gimbal assembly 29 pivots about center of rotation 30, load beam 28 supporting at its free end, adjacent to disk 16, in this Figure slider body 31 which includes a read-write
recording element. Included on load beam 28 is lift tab

30 32 having a free end 33 which contacts cam surface 34 of cam assembly 35. The detailed operation of dynamic head loading and unloading utilized in the above structure is described in the above-identified patent application.
Referring to Figure 8, this cross-sectional view 5 illustrates the utilization of upper load beam 28 which supports down slider body 31 which includes a read/write element (not shown) which is positioned above the upper surface of hard disk 16. Also illustrated in Figure 8 is up load beam 36 which supports up slider body 37 which includes a read-write recording element (not shown) which is positioned adjacent to the lower surface of rigid disk 16. The respective terms "up" and "down" with regard to the slider body are utilized to indicate the operative orientation of the read-write recording element associated with the slider body. For example, down slider body 31 is so named because the read-write recording element
associated with that body is facing downwardly as viewed from the position of head disk assembly 1 in Figure 6.
Similarly, up slider body 37 is so denominated because the read-write recording element included on up slider body 37 is facing upwardly.
As is best illustrated in Figure 8, upper load beam 28 and lower load beam 36 are supported for rotation about center of rotation 30 by actuator body 38. Actuator body 38 is rotatably supported on baseplate 8 by a suitable bearing assembly which includes actuator bearings 39. It will of course be recognized by those skilled in the art that the head positioning mechanism using head disk assembly 1 is of the moving coil rotary actuator type.
Actuator coil 40 is provided with appropriate driving signals to position the read-write recording element over the appropriate track based on commands received from actuator driver circuits which will be described
hereinafter. Permanent magnet 41 in conjunction with lower magnet plate 42 and return plate 43 provide a magnetic flux field across actuator coil 40. To reduce the height of head disk assembly 1, a single permanent magnet (permanent magnet 41) is utilized in conjunction with lower magnet plate 42 and return plate 43. The physical size and shape of actuator coil 40 is determined in part by the available clearance and space within
baseplate 8, and will be appreciated by reference to
Figures 6 and 7. A portion of actuator coil 40 extends beyond the edge of return plate 43. From an electrical standpoint, the number of turns and the gauge of the wire used in actuator coil 40 are provided such that the resistance of actuator coil 40 is approximately the same as the resistance of the spin motor. It is important that this relationship be established since during power down the back EMF of the spin motor is used to drive the actuator coil and move the head gimbal assembly into the unloaded position as illustrated in Figure 6. This equal resistance relationship is also important because for a given coil geometry the unload torque generated is at a maximum when the wire size and number of turns produces a coil resistance equal to the resistance of the series combination of the two spin motor windings plus circuit and trace resistances.
To protect the components in head disk assembly 1 from contamination by particles which could among other things, cause a head crash, cover 7 is sealed to baseplate 8 by providing appropriate interfitting relationship between cover 7, baseplate 8 and the utilization of a resilient cover seal 44 (Figure 8) . Resilient cover seal 44 extends around the periphery of baseplate 8 outside of lip 45 illustrated in Figures 6 and 8. Referring to
Figure 8, it will be noted that peripheral free edge 51 of cover 7 extends below the upper edge of lip 45, thereby providing an overlapping fit between baseplate 8 and cover 7. This overlapping configuration advantageously reduces susceptibility of the read/write recording elements inside the head disk assembly to EMI from external sources such as circuits of the computer to which the drive is
attached. Cover 7 is secured to baseplate 8 using a pair of suitable fastening means which cooperate with openings 46 and 47 in baseplate 8. Corresponding openings are provided in cover 7 to receive these fastening means.
As will be appreciated by reference to Figure 6, when the head gimbal assemblies are positioned as shown in Figure 6, the up slider body 37 and down slider body 38 are facing each other and shocks transmitted to the disk drive could cause them to impact and damage read/write recording elements on the sliders. To prevent this, protective member 48, which is supported by baseplate 8 extends outwardly from cam assembly 35 and is positioned between up slider body 37 and down slider body 31.
Protective member 48 extends in substantially the same plane as rigid disk 16 and is a planar structure the preferred composition of which is a PTFE filled acetal resin.
Also illustrated in Figure 6, read/write integrated circuit 49, which will be described hereinafter is
included within the housing of head disk assembly 1. Also illustrated in Figure 6 is flexible cable 50 which is used to carry the signals to and from the read/write recording elements on the ends of the respective load beams. Cable 50 also supplies signals to actuator coil 40.
Figure 7 is a top plan view of head disk assembly l illustrating the actuator moved such that the read/write recording elements on their respective slider bodies are in operative position above the surface of rigid disk 16. In this Figure, the configuration of protective member 48 is more clearly shown and it will also be appreciated that a portion of actuator coil 40 is visible beneath one edge of return plate 43. Also illustrated in Figure 7 is an arrow which indicates the direction of rotation of rigid disk 16 when it is spinning for operation. To better illustrate the structure of the actuator body 38 and actuator coil 40, attention is directed to Figure 9 which is a top plan view of the actuator assembly as viewed in Figures 6 and 7. As illustrated in Figure 9, actuator body 38 includes coil support extension 54, which in conjunction with gap filling adhesive 55 supports actuator coil 40. Actuator coil 40 includes a plurality of turns of insulated wire and has a generally planar configuration in a plane which is parallel to the plane of rigid disk 16 and a truncated triangular shape as
illustrated in Figure 9 in the axis perpendicular to the surface of rigid disk 16.
Figure 10 is a perspective view of head gimbal assembly 61 which includes down load beam 28. In Figure 10 cable 56 is illustrated in position on down load beam 28, cable 56 providing electrical connection to the read/write recording element supported on down slider body 31. Also illustrated in Figure 10 is cylindrical
extension 57 of swage plate 59, which extends through down load beam 28 and supports down load beam 28 in opening 58 (Figures 8 and 9) in actuator body 38. Up load beam 36 is supported in actuator body 38 using the same type of support, as will be appreciated by reference to Figure 8.

Figure 11 is a perspective view of the side of down load beam 28 which supports down slider body 31. Briefly, down slider body 31 is supported on down load beam 28 using head flexure 60. It will be appreciated by those skilled in the art that head gimbal assembly 61 is of the Watrous-type, and is also referred to as a Whitney-type suspension. Additional details of the head gimbal
assembly may be found in U.S. Patent Application Serial No. 07/M-1488 identified above.
In view of the compact footprint and thickness of head disk assembly 1 in accordance with the present invention, the environment in which the present invention will be utilized lends itself to palm top, hand held and lap top computers which in their use may readily be subjected to strong rotational forces as they are jarred, bumped and sometimes dropped when being carried about or otherwise not in use. Such rugged environment may, without appropriate protection, cause the slider utilized with the rigid disk to be moved into contact with the disk surface which may damage the slider and the disk surface as well making the disk drive inoperative and potentially causing the loss of data. Head disk assembly 1 of the present invention includes an inertial latch to prevent the rotary actuator from being moved into operative relationship with disk when the device which includes head disk assembly 1 may be jarred or subjected to inertial forces which would otherwise cause the slider body on the respective load beams to come into contact with the surface of rigid disk 16. The inertial latch utilized in head disk assembly 1 is positioned beneath return plate 43. A detailed description of the inertial latch is included in commonly assigned and copending U.S. Patent Application Serial No. 07/M-1491, filed December XX, 1990 by J. Morehouse et al. and entitled "Rotary Inertial Latch For Disk Drive Actuator", which is incorporated herein by reference in its entirety. The rotary inertial latch described in the above-identified patent application includes an inertial body which is mounted on a shaft which is substantially parallel to center of rotation 30 of the rotary actuator. The inertial body includes a pin which is capable of engaging finger 62 of coil support extension 54 of the actuator body so as to prevent the actuator from rotating. The inertial body is free to rotate about its shaft, but a small spring biases it in an unlocked position such that the locking members on the inertial member are positioned such that the actuator may be freely moved when the disk drive is not being subjected to rotational forces. However, when the disk drive is subjected to a strong rotational force or shock, the main body of the disk drive accelerates angularly in a
direction of the force, the inertial body rotates and assuming the shock is in a direction which would tend to swing the rotary actuator such that the heads would swing toward the disk, the locking members of the inertial body engage finger 62 and prevent the actuator from angular movement with respect to the head disk assembly. In addition the actuator is balanced as nearly as possible (considering manufacturing tolerances) with respect to its center of rotation. This balanced design minimizes torque on the actuator when the drive is subjected to
translational shocks, thereby minimizing rotational forces on the actuator.

Further protection of the disk drive in accordance with the present invention is provided through the use of a shock absorbing mounting arrangement to further isolate the head disk assembly from outside forces which may damage the device. A detailed description of the shock absorbent mounting for the head disk assembly of the present invention is found in commonly assigned and copending U.S. Patent Application Serial No. 07/M-1490, filed December XX, 1990 by J. Morehouse et al. and entitled "Shock Absorbent Mounting Arrangement For Disk Drive Or Other Component", which application is
incorporated herein by reference in its entirety.
Figure 12 is a combined electrical block diagram and partial structural diagram illustrating, from a circuit standpoint the drive and controller electronics board 2 and in addition the read/write preamplifier circuit 49 which is included within head disk assembly 1 (Figure 6) . In Figure 12, rigid disk 16 is illustrated in conjunction with lamination portions 17 of the spin motor. The spin-up and control of the drive of the spin motor is under the electrical control of spin control and drivers circuitry 70, an expanded block diagram of which is illustrated in Figure 13. In the present embodiment, as illustrated in Figure 1, spin control circuitry 70 is included on circuit board 6. Spin control circuitry 70 may be implemented using an Allegro Microsystems, Inc. , part no. ULN 8902 denominated Three Phase Brushless DC Motor Drive With Back-EMF Sensing (illustrated in Figure 13 in block diagram form) . Alternatively, the spin control and drivers circuitry described in the above identified U.S. Patent Application Serial No. 07/M-1493 could be used to control and drive the spin motor.
In Figure 12, upper load beam 28 is illustrated as positioned over a read/write area of disk 16, positioning slider 31 to a desired, addressed track location.
Electrical conductors in cable 56 (Figs. 10 and 11) provide analog information from the read/write recording element to read/write preamp 49, which in the present embodiment is located in baseplate 8 (as illustrated in Figures 6 and 7) . Read/write preamp 49 may be
implemented, for example, by a Silicon Systems
Incorporated, of Tustin, California, part no. 32R2030, or equivalent amplifier. Read/write preamp 49 provides the functions well known to those skilled in the art to facilitate the recording and playback of digital
information from the surface of rigid disk 16. Signals from read/write preamp 49 are provided to and received from read/write combo circuit 71, which in the present embodiment is included on circuit board 6 of the driving controller electronics board 2.
Figure 14 illustrates in functional block form the circuits included in read/write combo circuit 71.
Read/write combo circuit 71 may be implemented by, for example, a National Semiconductor part no. DP8491
denominated Hard Disk Data Path Electronics Circuit.
Control signals to actuator coil 40 of the rotary actuator- control the position of the read/write recording elements supported on their respective load beams. In the present embodiment, actuator driver and power off unload circuit 72 (Figure 12) provides control signals to
position the read/write recording elements to the desired location. A detailed block diagram of actuator driver and power off unload circuit 72 is illustrated in Figure 15. The portion of actuator driver and power off unload circuit 72 of Figure 15 illustrated within dashed line denoted by reference character 15-1 may be implemented by, for example, Allegro Microsystems, Inc., Worchester,
Mass., part no. 8932, denominated as a voice coil motor driver. The control signal to actuator coil 40 is analog and is provided via actuator driver and power off unload circuit 72. Also, as is well known to those skilled in the art, the feedback signals from the embedded servo (which will be described hereinafter) are provided in analog form. The seek control signals when the host desires that the read/write recording element be
positioned over a designated track, are provided in digital form. To convert the analog signals returned from the embedded servo loop to digital and to convert the digital signals required for addressing a particular track to analog signals, actuator A/D & D/A circuit 73 is utilized. A detailed block diagram of the circuitry utilized in actuator A/D & D/A circuit 73 is illustrated in Figure 16. This circuit may be conveniently
implemented utilizing a generally available part from Analog Devices, Norwood, Mass., their part no. ADC 7773, denominated as a complete embedded servo front end for hard disk drive.
Returning to Figure 12, disk controller 74 is coupled between read/write combo circuit 71, data bus 75, RAM buffer 76, and also provides signals to and receives signals from interface connector 4 for communication outside of the drive and controller electronics board 2. Disk controller 74 may be conveniently implemented using Cirrus Logic, Inc. of Milpitas, CA, Integrated PC Disk and Controller part no. CL-SH 265. RAM buffer 76 may be any digital storage device having a capacity of 32K
addressable storage locations, each of 8 bits in width, and is preferably for convenience a semiconductor type random access memory device.
A high level block diagram of disk controller 74 is illustrated in Figure 17.
Drive and controller electronics board 2 further includes microprocessor 77 which is coupled to data bus 75, read only memory 78 and gate array 79. Microprocessor 77 may be implemented by, for example, a Motorola microprocessor model no. 68HC11 or an Intel Corporation microprocessor part no. 80C196, or similarly functional microprocessors from other sources. Read only memory 78 may be any suitable memory device having 32,000 storage
locations, each 8 bits wide, and in the present implementation, for reduction of size, is preferably a semiconductor memory device.
Figure 18 is a block diagram of gate array 79, illustrating the blocks utilized therein, and a
description of the operation of gate array 79 will follow hereinafter.
An embedded servo system is utilized in head disk assembly 1 of the present invention, the embedded servo system being implemented with the use of electronics which is illustrated in Figure 12 (which includes other
circuitry) . As illustrated in Figure 12, rigid disk 16 includes a plurality of circular tracks, for example tracks 121-i and 121- (i+1). If both sides of rigid disk 16 are used for data, corresponding tracks on the disk surfaces are approximately cylindrically aligned. Each track is segmented into one or more sectors SCT-01,
SCT-02 , ... , SCT-2n by prerecorded information in embedded servo field regions 120-1 through 120-2n. Each servo field region 120-j, where j = 1, 2, ..., 2n, includes m concentric servo fields, where m is the number of
concentric circular tracks on the disk, that is, one servo field in each data track at position j (a total of 2nm servo fields per surface) . The particular embedded servo system utilized with disk assembly 1 and its associated drive and controller electronics is more completely described in copending and commonly assigned U.S. Patent Application Serial No. 07/M-1470 describe above.
Attention is directed to Figure 18 which is a block diagram of gate array 79 of Figure 12. As will be
appreciated by reference to Figures 12 and Figure 18, multiplexed low address and data bus 75 is coupled to gate array 79 for the bidirectional flow of information between microprocessor 77 and gate array 79. Throughout the drawing figures, lines with arrows on both ends indicate that there is a bidirectional flow of information over the lines in contrast to lines with an arrow on a single end which indicates that information passes in the direction of the arrow only. As will also be appreciated by reference to Figures 12 and 18, address information is provided from microprocessor 77 to gate array 79 as inputs to gate array 79. In addition, gate array 79 provides information to and receives information from other
circuitry in Figure 12 and for convenience for
understanding lines entering and leaving gate array 79 in Figure 18 have labels adjacent thereto to indicate the circuitry from which or to which the line is coupled.
Referring to Figure 18, address latch 82 is coupled to multiplexed low address and data bus 75 from which it receives and holds the lower order address information received from multiplexed low address and data bus 75.
Address latch 82 receives an address strobe from
microprocessor 77 which establishes the timing when the address is valid. All outputs from address latch 82 are provided over bus 83 to read only memory 78 and
additionally low order address information is also
provided from address latch 82 to actuator A/D & D/A circuit 73. The low order address from address latch 82 is also provided to address decoder 84 over bus 85.
Address latch 82 is equivalent to any available 8 bit latch, such as a TTL74LS373 latch. Address decoder 84 receives the high order address information from
microprocessor 77 via bus 86. Address decoder 84 uses the external high order address bits, the latched low order address bits from address latch 82 and the timing signal, denominated DATASTROBE, received over line 80 from
microprocessor 77 to decode the address for the gate array registers as well and for external chip select lines.
More particularly, EXTERNAL CHIP SELECTS signals are provided over line 87 to the serial port select of
read/write combo circuit 71, the select port for spin control circuit 70, as well as for the chip select inputs to actuator A/D & D/A circuit 73. Internally within gate array 79 the decoded address information is used to select memory mapped control/status registers for all of the blocks in gate array 79. Address decoder 84 may take the form of a well known circuit such as a group 74LS138 decoders.
Clock logic memory mapped register 88 generates all of the required clock signals for programmable low power timer circuit 89, programmable word length serial port 90, digital demodulator & Gray address separator 91, pulse width modulated timer 92, pulse width modulated timer 93 and encoder/decoder 94. Crystal 95, which is provided externally of gate array 79, is used to provide a stable frequency of oscillation for clock logic memory mapped register 88. The memory mapped register portion of clock logic memory mapped register 88 functions to insure that minimum power is used or dissipated by enabling only the required clocks for the operation in progress at the time the clock signal is required. The memory mapped register circuitry utilized in clock logic memory mapped register 88 is illustrated in Figure 19. Referring to Figure 19, the portion of memory mapped register utilized to provide clock signals to programmable low power timers 89, pulse width modulated timer 92, pulse width modulated timer 93 ENDEC 94, digital demodulator & Gray address separator 91, and programmable word length serial port 90 is
illustrated. A two input AND gate is provided for each of these functions. In implementing the memory mapped
register, D flip-flops 96 through 100 and 115-116 are utilized. Each of these flip-flops receives a clock signal from address decoder 88. The Q output of D flip-flop 96 is provided to one of the inputs of NAND
implemented oscillator 101. The other input to NAND oscillator 101 is coupled to one of the terminals of crystal 95 and the output of NAND implemented oscillator 101 is coupled to the other terminal of crystal 95. The output of NAND implemented oscillator 101 is coupled to one of the inputs of AND gates 102-105 and 117-118. The D inputs of D flip-flops 96-100 and 115-116 are connected to unique lines of multiplexed low address and data bus 75. D flip-flop 96 drives through its Q output NAND implemented oscillator 101, while the Q output of D flip- flops 97-100 drive the associated second inputs to AND gates 102-105 respectively; and the Q output of D flip- flops 115 and 116 drive the second input of AND gates 117 and 118 respectively. From the circuit, it will of course be appreciated that clock signals to the circuits which are coupled to AND gates 102-105 and 117-118 are provided only at the time during which a clock signal is required. Programmable low power timer circuit 89 generates timing signals which are provided to read/write preamp 49, over line 106, a timing signal on line 107 to read/write combo circuit 71, a plurality of timing signals (which will be fully described hereinafter) over bus 108 to digital demodulator & Gray address separator 91 and, a timing signal over line 109 to integrity checks & address comparator 110. Digital demodulator & Gray address separator 91 generates windows for the pulse detector included in read/write combo circuit 71, over bus 111. To aid in understanding the operation of the various circuits and timing windows, attention is directed to Figure 20a which illustrates the servo field utilized on the disk of the present invention, along with Figure 20b which
illustrates the windows produced by programmable low power timer circuit 89 and Figure 20c which illustrates the windows produced by digital demodulator & Gray address separator 91. As will be appreciated by reference to Figures 20b and 20c, the timing of the respective windows have been illustrated in timed relationship to the servo field of Figure 20a. A detailed description of the servo field in Figure 20a along with the circuitry involved is found in U.S. Patent Application Serial No. 07/M-1470 referred to above and the explanation therefore will not be repeated. As an aid to understanding the windows generated by programmable low timers circuit 89 and digital demodulator & Gray address separator 91, the following table is provided which in the left hand column lists the window acronym designation illustrated in Figures 20b and 20c, in the center column provides a descriptive title for the windows function and in the far right column indicates the circuit to which the window signal is provided.

TABLE

Integrity checks & address comparator 110 compares the integrity check pattern which is created from reading the servo field information (which is described in detail from the above-referenced M-1470 U.S. Patent Application Serial No. 07/M-1470) with the expected pattern stored in a memory mapped register in integrity check & address comparator 110. In addition, the track address is selectively compared with the expected track address during track following (ON track MODE) . If either of these comparisons do not match, an error condition stored in a status register is assumed and is sent to
microprocessor 77 over data line 112 as status
information.
Returning to digital demodulator & Gray address separator 91 which was briefly referred to above, the output of this circuit is provided over bus 111 as windows for the pulse detector in read/write combo chip 71.
Digital demodulator & Gray address separator 91 receives, over line 113, the transition pulse and polarity signals from read/write combo chip 71. Using this information, digital demodulator & Gray address separator 91 determines the track address and provides this track address
information to microprocessor 77, as well as to integrity checks & address comparator 110.
Pulse width modulated timer 92 has an input coupled to multiplexed low address and data bus 75 through which the microprocessor programs the frequency and the duty cycle of the output. This data is stored in two memory registers which are included in pulse width modulated timer 92 which generates at its output a control signal to set the level of the read threshold, this control signal being provided to read/write combo circuit 71 over line 123. Pulse width modulated timer 93 also receives an input from multiplexed low address and data bus 75 and provides at its output a write current control signal which is provided to read/write preamp circuit 49 over line 114. The outputs of timers 92 and 93 are filtered by suitable RC networks (not shown) to provide an appropriate voltage for the above two functions. The time constant of the RC network for the output of these two timers is a function of the device being driven and is determined by well known techniques.
Programmable word length serial port 90 is utilized to program read/write combo circuit 71, actuator driver 72 and spin control circuit 70. Serial clock output from programmable word length serial port 90 is also provided to each of the foregoing chips. The programming
information to be provided to read/write combo circuit 71, actuator driver 72 and spin control and driver circuit 70 is loaded into programmable word length serial port 90 from microprocessor 77 over multiplexed low address and data bus 75. The designated address for this programming is set by the microprocessor through address decoder 84, and the data contents and length is set by a
microprocessor through the memory map register included in programmable word length serial port 90.
Power management circuit 119 is a memory mapped set of registers which controls the activation of each
functional block of the drive. Only the blocks requiring to be active at a given time are activated and therefore the minimum overall power required by the drive is
utilized.
Encoder/decoder 94 receives NRZ write data and clock signals from disk controller 74 and generates from these signals write code data which is provided over line 120 to read/write combo circuit 71. Encoder/decoder 94 receives RDGATE and WRGATE signals as enable signals from disk controller 74. Encoder/decoder 94 receives read code data and clock signals from read/write combo circuit 71 and generates NRZ read data and NRZ read clock signals which are provided to disk controller 74 over lines 121 and 122 respectively. Encoder decoder circuit 94 may be
implemented by using standard 1,7 encoding circuitry well known to those skilled in the art.

We claim:

1. A disk drive information storage device
comprising:
a substantially rigid disk having a diameter in range of from about 45mm to about 50mm;
a housing having a footprint that includes a
width of about 51mm;
a spin motor supported by said housing for
rotating said rigid disk, said spin motor including a rotor for receiving said rigid disk and rotating said rigid disk about an axis;
actuator means including an actuator having a body portion rotatably supported on said housing for rotation about an axis, said actuator means including an actuator drive motor coupled to said actuator body for providing rotary motion to said actuator and a transducer support arm connected to said actuator
body for rotation therewith, said transducer support arm including a free end and a transducer means
supported adjacent to said free end.

2. A storage device according to Claim 1, wherein said footprint includes a length of about 70mm.

3. A storage device according to Claim 1, wherein said transducer support arm includes a lift tab extending from said free end, a cam assembly supported by said housing and positioned in operative relationship with said lift tab whereby when said transducer arm is pivoted to an outer peripheral zone of said disk said lift tab contacts said cam assembly and moves said transducer away from said surface of said disk.

4. A storage device according to Claim 1, wherein said actuator drive motor includes a coil coupled to said actuator body, said coil having first and second sides,