WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO1992003848) STACKING OF INTEGRATED CIRCUITS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1992/003848    International Application No.:    PCT/GB1991/001459
Publication Date: 05.03.1992 International Filing Date: 28.08.1991
IPC:
H01L 23/48 (2006.01), H01L 25/065 (2006.01)
Applicants: LSI LOGIC EUROPE PLC [GB/GB]; Grenville Place, The Ring, Bracknell, Berkshire RG12 1BP (GB) (For All Designated States Except US).
MIAOULIS, Niko [GB/GB]; (GB) (For US Only)
Inventors: MIAOULIS, Niko; (GB)
Agent: THOMSON, Roger, Bruce; W.P. Thompson & Co., Eastcheap House, Central Approach, Letchworth, Hertfordshire SG6 3DS (GB)
Priority Data:
9018766.7 28.08.1990 GB
Title (EN) STACKING OF INTEGRATED CIRCUITS
(FR) EMPILAGE DE CIRCUITS INTEGRES
Abstract: front page image
(EN)An integrated circuit wafer (10) is made with a through-going plug (16) of electrically conductive material which protrudes above the wafer surface so that one can stack integrated circuits spaced from each other but interconnected electrically by the plugs (16) which extend therethrough in mutual contact.
(FR)Une plaquette de circuits intégrés (10) est pourvue d'une fiche traversante (16), fabriquée à partir d'un matériau électroconducteur, qui fait saillie au-dessus de la surface de la plaquette de sorte que l'on puisse empiler les circuits intégrés afin qu'ils demeurent espacés les uns des autres, mais électriquement interconnectés par les fiches (16) qui s'étendent à travers eux en contact réciproque.
Designated States: GB, JP, US.
European Patent Office (AT, BE, CH, DE, DK, ES, FR, GB, GR, IT, LU, NL, SE).
Publication Language: English (EN)
Filing Language: English (EN)