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1. WO1991020073 - MULTIPLE BUFFER COMPUTER DISPLAY CONTROLLER APPARATUS

Publication Number WO/1991/020073
Publication Date 26.12.1991
International Application No. PCT/US1991/003708
International Filing Date 28.05.1991
Chapter 2 Demand Filed 09.01.1992
IPC
G09G 5/391 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
391Resolution modifying circuits, e.g. variable screen formats
G09G 5/399 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
399using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
CPC
G09G 2340/12
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2340Aspects of display data processing
12Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
G09G 2360/122
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2360Aspects of the architecture of display systems
12Frame memory handling
122Tiling
G09G 5/391
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
391Resolution modifying circuits, e.g. variable screen formats
G09G 5/40
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
40characterised by the way in which both a pattern determined by character code and another pattern are displayed simultaneously, or either pattern is displayed selectively, e.g. with character code memory and APA, i.e. all-points-addressable, memory
Applicants
  • THE GENERAL HOSPITAL CORPORATION [US]/[US]
Inventors
  • TAAFFE, James, L.
Agents
  • WAKIMURA, Mary, Lou
Priority Data
537,33113.06.1990US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) MULTIPLE BUFFER COMPUTER DISPLAY CONTROLLER APPARATUS
(FR) APPAREIL A CONTROLEUR D'AFFICHAGE MULTI-TAMPON POUR ORDINATEURS
Abstract
(EN)
Multiple buffers are employed in a display controller for a computer display system. A video RAM is utilized in the display controller to hold display data corresponding to graphics to be displayed on the computer display monitor. And a series of dynamic RAMs are employed in the display controller to hold display data corresponding to images to be displayed on the computer display monitor. A data mixer receives and mixes signals from the video RAM and one of the dynamic RAMs to form signals which are used to drive the display monitor. The signals provide graphics displayed at one resolution overlaid on images displayed at a different resolution on the monitor. A FIFO buffer and rectangle loader provide efficient loading of blocks of display data in the display controller buffers.
(FR)
On utilise de multiples tampons dans un contrôleur de l'affichage d'un système d'affichage pour ordinateurs. Le contrôleur d'affichage utilise une RAM vidéo pour stocker les données d'affichage qui correspondent aux graphiques à afficher sur l'écran de visualisation de l'ordinateur. Il emploie également une série de RAM dynamiques pour stocker les données d'affichage qui correspondent aux images à afficher sur ledit écran de visualisation. Un mélangeur de données reçoit et mélange les signaux provenant de la RAM vidéo et de l'une des RAM dynamiques, afin de former des signaux destinés à commander l'écran de visualisation. Grâce à ces signaux, des graphiques ayant une première résolution s'affichent sur l'écran, où ils se superposent à des graphiques ayant une résolution différente de la première. Un tampon FIFO (premier entré, premier sorti) et un chargeur de rectangles assurent un chargement efficace des blocs de données d'affichage dans les tampons du contôleur d'affichage.
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