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1. (WO1991018394) READ/WRITE/RESTORE CIRCUIT FOR MEMORY ARRAYS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1991/018394 International Application No.: PCT/US1990/005897
Publication Date: 28.11.1991 International Filing Date: 15.10.1990
Chapter 2 Demand Filed: 16.12.1991
IPC:
G11C 7/00 (2006.01) ,G11C 7/06 (2006.01) ,G11C 11/416 (2006.01) ,G11C 11/419 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
06
Sense amplifiers; Associated circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
41
forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
413
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
414
for memory cells of the bipolar type
416
Read-write (R-W) circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
41
forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
413
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
417
for memory cells of the field-effect type
419
Read-write (R-W) circuits
Applicants:
INTERNATIONAL BUSINESS MACHINES CORPORATION [US/US]; Armonk, NY 10504, US
Inventors:
MONTEGARI, Frank, Alfred; US
Agent:
MELLER, Michael, N.; Meller & Associates P.O. Box 2198 Grand Central Station New York, NY 10163, US
Priority Data:
525,28617.05.1990US
Title (EN) READ/WRITE/RESTORE CIRCUIT FOR MEMORY ARRAYS
(FR) CIRCUIT DE LECTURE/ECRITURE/REMISE A L'ETAT INITIAL POUR RESEAUX DE MEMOIRE
Abstract:
(EN) A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of components and control lines needed. The circuit is preferably implemented in BICMOS technology.
(FR) On décrit un circuit de lecture/écriture/remise à l'état initial utilisé dans un réseau de mémoire tel un réseau de mémoire à accès sélectif (RAM) statique. Le circuit utilise des signaux de données et de compléments de données possédant trois états, en combinaison avec un signal d'adresse à deux états afin d'effectuer des fonctions de lecture, d'écriture et de remise à l'état initial pour le réseau et de réduire le nombre d'éléments et de lignes de commande nécessaires. Le circuit est de préférence réalisé en technologie BICMOS.
Designated States: JP
European Patent Office (AT, BE, CH, DE, DK, ES, FR, GB, GR, IT, LU, NL, SE)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP0528799JPH05507169