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1. (WO1991006982) PASSIVATED POLYCRYSTALLINE SEMICONDUCTORS AND QUANTUM WELL/SUPERLATTICE STRUCTURES FABRICATED THEREOF
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1991/006982 International Application No.: PCT/US1990/006122
Publication Date: 16.05.1991 International Filing Date: 23.10.1990
IPC:
H01L 21/324 (2006.01) ,H01L 29/15 (2006.01) ,H01L 29/16 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
324
Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
15
Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
16
including, apart from doping materials or other impurities, only elements of the fourth group of the Periodic System in uncombined form
Applicants:
MCNC [US/US]; 3021 Cornwallis Road P.O. Box 12889 Research Triangle Park, NC 27709, US
Inventors:
NICOLLIAN, Edward, H.; US
REISMAN, Arnold; US
TSU, Raphael; US
Agent:
McCOY, Michael, D. ; Bell, Seltzer, Park & Gibson P.O. Drawer 34009 Charlotte, NC 28234, US
Priority Data:
426,57124.10.1989US
Title (EN) PASSIVATED POLYCRYSTALLINE SEMICONDUCTORS AND QUANTUM WELL/SUPERLATTICE STRUCTURES FABRICATED THEREOF
(FR) SEMICONDUCTEURS POLYCRYSTALLINS PASSIVES ET STRUCTURES DE PUITS QUANTIQUES/SUPER RESEAUX FABRIQUEES AVEC CES SEMICONDUCTEURS
Abstract:
(EN) The internal grain boundaries and intergranular spaces of polycrystalline semiconductor material may be passivated with an amorphous material, to substantially eliminate the dangling bonds at the internal grain boundaries. The passivated polycrystalline material of the present invention exhibits a lower electrically active defect density at the grain boundaries and intergranular space compared to unpassivated polycrystalline material. Moreover, large classes of amorphous passivating materials may be used for each known semiconductor material so that the passivating process may be readily adapted to existing process parameters and other device constraints. Passivated polycrystalline material may be employed to form the well or low energy bandgap layer of a quantum well device or superlattice, while still maintaining the required tunneling effect.
(FR) Les frontières de grains internes et les espaces intergranulaires d'un matériau semiconducteur polycrystallin peuvent être passivés avec un matériau amorphe pour éliminer sensiblement les combinaisons libres au niveau des frontières de grains internes. Le matériau polycrystallin passivé de la présente invention présente une densité de défaut d'activité électrique plus faible au niveau des frontières de grain et de l'espace intergranulaire par rapport au matériau polycrystallin non passivé. De plus, de grandes variétés de matériaux de passivation amorphes peuvent être utilisés pour chaque matériau semi-conducteur connu de sorte que le procédé de passivation peut facilement s'adapter à des paramètres de traitement existants et autres contraintes de dispositifs. Le matériau polycrystallin passivé peut être utilisé pour former le puits ou la couche d'espace interbande de faible énergie d'un dispositif à puits quantique ou d'un super treillis tout en maintenant l'effet tunnel requis.
Designated States: CA, JP, KR
European Patent Office (AT, BE, CH, DE, DK, ES, FR, GB, GR, IT, LU, NL, SE)
Publication Language: English (EN)
Filing Language: English (EN)