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1. (WO1991006980) SEMICONDUCTEUR INTEGRATED CIRCUIT
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1991/006980 International Application No.: PCT/JP1990/001444
Publication Date: 16.05.1991 International Filing Date: 07.11.1990
IPC:
H01L 27/02 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
Applicants:
FUJITSU LIMITED [JP/JP]; 1015, Kamikodanaka Nakahara-ku Kawasaki-shi Kanagawa 211, JP (AllExceptUS)
FUJITSU VLSI LIMITED [JP/JP]; 1844-2, Kozoji-cho 2-chome Kasugai-shi Aichi 487, JP (AllExceptUS)
NAKANO, Tomio [JP/JP]; JP (UsOnly)
KATO, Yoshiharu [JP/JP]; JP (UsOnly)
NOMURA, Hidenori [JP/JP]; JP (UsOnly)
Inventors:
NAKANO, Tomio; JP
KATO, Yoshiharu; JP
NOMURA, Hidenori; JP
Agent:
AOKI, Akira ; A. Aoki & Associates Seiko Toranomon Bldg. 8-10, Toranomon 1-chome Minato-ku Tokyo 105, JP
Priority Data:
1/28911807.11.1989JP
Title (EN) SEMICONDUCTEUR INTEGRATED CIRCUIT
(FR) CIRCUIT INTEGRE A SEMI-CONDUCTEURS
Abstract:
(EN) A semiconductor integrated circuit in which an external power source voltage is received from outside a semiconductor chip via external power source terminals, the external power source voltage is dropped through voltage-dropping means provided in the semiconductor chip, and the dropped voltage is supplied as an internal power source voltage to the semiconducteur chip, wherein a plurality of voltage-dropping means are provided for a plurality of semiconductor circuit blocks in the semiconductor chip respectively, in order to effectively suppress the voltage change of the internal power source in operation circuits requiring large currents.
(FR) Circuit intégré à semi-conducteurs recevant une tension provenant d'une alimentation située à l'extérieur d'une puce à semi-conducteurs par l'intermédiaire de bornes externes de la source d'alimentation. Un organe réducteur de tension contenu dans la puce fait chuter la tension de l'alimentation externe, et la tension réduite est appliquée en tant que tension d'alimentation interne à la puce à semi-conducteurs. Ladite puce présente un ensemble d'organes réducteurs de tension destinés respectivement à un ensemble de blocs de circuit à semi-conducteurs, afin de supprimer efficacement les variations de tension de l'alimentation interne de circuits requérant des courants intenses.
Designated States: KR, US
European Patent Office (DE, FR, GB)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
EP0454859KR1019920702026