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1. (WO1990016080) CHIP CARRIER WITH TERMINATING RESISTIVE ELEMENTS
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/1990/016080 International Application No.: PCT/US1990/002191
Publication Date: 27.12.1990 International Filing Date: 23.04.1990
Chapter 2 Demand Filed: 21.12.1990
IPC:
H01L 23/498 (2006.01) ,H01L 23/538 (2006.01) ,H01L 23/64 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
498
Leads on insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
538
the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
58
Structural electrical arrangements for semiconductor devices not otherwise provided for
64
Impedance arrangements
Applicants: CRAY RESEARCH, INC.[US/US]; 608 Second Avenue South Minneapolis, MN 55402, US
Inventors: NELSON, Stephen; US
STEITZ, Richard, R.; US
NEUMANN, Eugene, F.; US
AUGUST, Melvin, C.; US
KRUCHOWSKI, James, N.; US
Agent: HAMRE, Curtis, B.; Merchant, Gould, Smith, Edell, Welter & Schmidt 3100 Norwest Center 90 South Seventh Street Minneapolis, MN 55402, US
Priority Data:
366,60415.06.1989US
Title (EN) CHIP CARRIER WITH TERMINATING RESISTIVE ELEMENTS
(FR) SUPPORT DE PUCE AYANT DES ELEMENTS RESISTIFS TERMINAUX
Abstract:
(EN) A generic chip carrier (10) is described which includes, as integral parts, a voltage bus (13) and a plurality of terminating resistors (21) connected between the voltage bus (13) and signal traces (18) on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit (26), i.e., source or destination termination of signals. A signal trace may be customized by 'opening' the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads (20) and terminating resistors (21) are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.
(FR) Un support de puce générique (10) comprenant comme éléments intégraux un bus de tension (13) et une pluralité de résistances terminales (21) reliées entre le bus de tension (13) et des traces de signaux (18) sur le support. Le bus de tension boucle le support de puce, fournissant ainsi une grande surface de métal. Grâce à l'usage sélectif des résistances terminales, le support générique peut être particularisé à un type particulier de circuit intégré (26), c'est-à-dire, une source ou une destination terminale de signaux. Une trace de signal peut être particularisée par 'l'ouverture' de la résistance terminale au moyen d'une crête de courant appliquée par une sonde électrique normale. Des plots de connexion (20) de rechange et des résistances terminales (21) sont placés à intervalles autour de la périphérie du support pour s'assurer contre les résistances terminales défectueuses ou enlevées par erreur.
Designated States: JP, KR
European Patent Office (EPO) (AT, BE, CH, DE, DK, ES, FR, GB, IT, LU, NL, SE)
Publication Language: English (EN)
Filing Language: English (EN)